Unformatted text preview: JMP--Jump
64-Bit Mode Valid N.S. Compat/ Leg Mode Valid Valid Opcode EB cb E9 cw Instruction JMP rel8 JMP rel16 E9 cd FF /4 JMP rel32 JMP r/m16 Valid N.S. Valid Valid FF /4 JMP r/m32 N.S. Valid FF /4 EA cd EA cp FF /5 FF /5 REX.W + FF /5 JMP r/m64 JMP ptr16:16 JMP ptr16:32 JMP m16:16 JMP m16:32 JMP m16:64 Valid Inv. Inv. Valid Valid Valid N.E. Valid Valid Valid Valid N.E. Description Jump short, RIP = RIP + 8-bit displacement sign extended to 64-bits Jump near, relative, displacement relative to next instruction. Not supported in 64bit mode. Jump near, relative, RIP = RIP + 32-bit displacement sign extended to 64-bits Jump near, absolute indirect, address = sign-extended r/m16. Not supported in 64-bit mode. Jump near, absolute indirect, address = sign-extended r/m32. Not supported in 64-bit mode. Jump near, absolute indirect, RIP = 64-Bit offset from register or memory Jump far, absolute, address given in operand Jump far, absolute, address given in operand Jump far, absolute indirect, address given in m16:16 Jump far, absolute indirect, address given in m16:32. Jump far, absolute indirect, address given in m16:64. Description
Transfers program control to a different point in the instruction stream without recording return information. The destination (target) operand specifies the address of the instruction being jumped to. This operand can be an immediate value, a general-purpose register, or a memory location. This instruction can be used to execute four different types of jumps: Near jump--A jump to an instruction within the current code segment (the segment currently pointed to by the CS register), sometimes referred to as an intrasegment jump. Short jump--A near jump where the jump range is limited to 128 to +127 from the current EIP value. Vol. 2 3-501 INSTRUCTION SET REFERENCE, A-M Far jump--A jump to an instruction located in a different segment than the current code segment but at the same privilege level, sometimes referred to as an intersegment jump. Task switch--A jump to an instruction located in a different task. A task switch can only be executed in protected mode (see Chapter 6, in the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, for information on performing task switches with the JMP instruction). Near and Short Jumps. When executing a near jump, the processor jumps to the address (within the current code segment) that is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the EIP register). A near jump to a relative offset of 8-bits (rel8) is referred to as a short jump. The CS register is not changed on near and short jumps. An absolute offset is specified indirectly in a general-purpose register or a memory location (r/m16 or r/m32). The operand-size attribute determines the size of the target operand (16...
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- Winter '11
- X86, Intel corporation, Packed Single-Precision Floating-Point, Packed Double-Precision Floating-Point, single-precision floating-point values