ia-32_instruction-set-ref_a-m

Lss instruction offers a more efficient method of

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Unformatted text preview: mory operand effective address is outside the SS segment limit. Vol. 2 3-595 INSTRUCTION SET REFERENCE, A-M #PF(fault-code) #AC(0) #UD If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made. If attempt is made to load the CS register. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #GP(0) If the memory address is in a non-canonical form. If an attempt is made to load SS register with NULL segment selector when CPL = 3. If an attempt is made to load SS register with NULL segment selector when CPL < 3 and CPL RPL. #GP(selector) If segment selector index is outside descriptor table limits. If the memory access to the descriptor table is non-canonical. If the SS register is being loaded and the segment selector's RPL and the segment descriptor's DPL are not equal to the CPL. If the SS register is being loaded and the segment pointed to is a nonwritable data segment. If the DS, ES, FS, or GS register is being loaded and the segment pointed to is not a data or readable code segment. If the DS, ES, FS, or GS register is being loaded and the segment pointed to is a data or nonconforming code segment, but both the RPL and the CPL are greater than the DPL. #SS(0) #SS(selector) #PF(fault-code) #AC(0) #UD If the stack address is in a non-canonical form. If the SS register is being loaded and the segment pointed to is marked not present. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. If attempt is made to load the CS register. 3-596 Vol. 2 INSTRUCTION SET REFERENCE, A-M MOV--Move to/from Control Registers Opcode 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r 0F 22 /r REX + 0F 22 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r 0F 20 /r REX + 0F 20 /r NOTE: 1. MOV CR* instructions, except for MOV CR8, are serializing instructions. MOV CR8 is not architecturally defined as a serializing instruction. For more information, see Chapter 7 in Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A. Instruction MOV CR0,r32 MOV CR0,r64 MOV CR2,r32 MOV CR2,r64 MOV CR3,r32 MOV CR3,r64 MOV CR4,r32 MOV CR4,r64 MOV CR8,r32 MOV CR8,r64 MOV r32,CR0 MOV r64,CR0 MOV r32,CR2 MOV r64,CR2 MOV r32,CR3 MOV r64,CR3 MOV r32,CR4 MOV r64,CR4 MOV r32,CR8 MOV r64,CR8 64-Bit Mode N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. Valid Compat/ Leg Mode Valid N.E. Valid N.E. Valid N.E. Valid N.E. N.E. N.E. Valid N.E. Valid N.E. Valid N.E. Valid N.E. N.E. N.E. Description Move r32 to CR0. Move r64 to extended CR0. Move r32 to CR2. Move r64 to extended CR2. Move r32 to CR3. Move r64 to extended CR3. Move r32 to CR4. Move r64 to extended CR4. Move r32 to CR8. Move r64 to extended CR8. Move CR0 to r32. Move extended CR0 to r64. Move CR2 to r32. Move extended CR2 to r64. Move CR3 to r32. Move extended CR3...
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