ia-32_instruction-set-ref_a-m

Q1 of the quotient floating point exceptions is ia d

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: or overflow occurred. Source operand is an SNaN value, , or unsupported format. Source operand is a denormal value. Result is too small for destination format. Value cannot be represented exactly in destination format. Protected Mode Exceptions #NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. 3-364 Vol. 2 INSTRUCTION SET REFERENCE, A-M Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. Vol. 2 3-365 INSTRUCTION SET REFERENCE, A-M FRNDINT--Round to Integer Opcode D9 FC Instruction FRNDINT 64-Bit Mode Valid Compat/ Leg Mode Valid Description Round ST(0) to an integer. Description Rounds the source value in the ST(0) register to the nearest integral value, depending on the current rounding mode (setting of the RC field of the FPU control word), and stores the result in ST(0). If the source value is , the value is not changed. If the source value is not an integral value, the floating-point inexact-result exception (#P) is generated. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation ST(0) RoundToIntegralValue(ST(0)); FPU Flags Affected C1 C0, C2, C3 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. Undefined. Floating-Point Exceptions #IS #IA #D #P Stack underflow occurred. Source operand is an SNaN value or unsupported format. Source operand is a denormal value. Source operand is not an integral value. Protected Mode Exceptions #NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. 3-366 Vol. 2 INSTRUCTION SET REFERENCE, A-M Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. Vol. 2 3-367 INSTRUCTION SET REFERENCE, A-M FRSTOR--Restore x87 FPU State Opcode DD /4 Instruction FRSTOR m94/108byte 64-Bit Mode Valid Compat/ Leg Mode Valid Description Load FPU state from m94byte or m108byte. Description Loads the FPU state (operating environment and register stack) from the memory area specified with the source operand. This state data is typically written to the specified memory location by a previous FSAVE/FNSAVE instruction. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, show the layout in memory of the stored environment, depending on the operating mode of the processor (protected or real) and the current operand-size attribute (16-bit or 32-bit). In virtual-8086 mode, the real mode layouts are used. The contents...
View Full Document

This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

Ask a homework question - tutors are online