ia-32_instruction-set-ref_a-m

Replace st0 with its sine description computes the

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Unformatted text preview: ES: F Means finite floating-point value. * Indicates floating-point invalid-arithmetic-operand (#IA) exception. If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-of-range conditions. Source values outside the range -263 to +263 can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2 or by using the FPREM instruction with a divisor of 2. See the section titled "Pi" in Chapter 8 of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, for a discussion of the proper value to use for in performing such reductions. Vol. 2 3-379 INSTRUCTION SET REFERENCE, A-M This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation IF ST(0) < 263 THEN C2 0; TEMP cosine(ST(0)); ST(0) sine(ST(0)); TOP TOP - 1; ST(0) TEMP; ELSE (* Source operand out of range *) C2 1; FI; FPU Flags Affected C1 Set to 0 if stack underflow occurred; set to 1 of stack overflow occurs. Set if result was rounded up; cleared otherwise. C2 C0, C3 Set to 1 if outside range (-263 < source operand < +263); otherwise, set to 0. Undefined. Floating-Point Exceptions #IS #IA #D #U #P Stack underflow or overflow occurred. Source operand is an SNaN value, , or unsupported format. Source operand is a denormal value. Result is too small for destination format. Value cannot be represented exactly in destination format. Protected Mode Exceptions #NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. 3-380 Vol. 2 INSTRUCTION SET REFERENCE, A-M Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. Vol. 2 3-381 INSTRUCTION SET REFERENCE, A-M FSQRT--Square Root Opcode D9 FA Instructio n FSQRT 64-Bit Mode Valid Compat/ Leg Mode Valid Description Computes square root of ST(0) and stores the result in ST(0). Description Computes the square root of the source value in the ST(0) register and stores the result in ST(0). The following table shows the results obtained when taking the square root of various classes of numbers, assuming that neither overflow nor underflow occurs. Table 3-42. FSQRT Results SRC (ST(0)) - DEST (ST(0)) * * -0 +0 +F + NaN -F -0 +0 +F + NaN NOTES: F Means finite floating-point value. * Indicates floating-point invalid-arithmetic-operand (#IA) exception. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation ST(0) SquareRoot(ST(0)); FPU Flags Affected C1 C0, C2, C3 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. Undefined. 3-382 Vol. 2 INSTRUCTION SE...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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