ia-32_instruction-set-ref_a-m

Set reference a m flags affected the of sf zf af pf

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Unformatted text preview: nd *) Intel C/C++ Compiler Intrinsic Equivalent __m128 _mm_load_ps (float * p) void_mm_store_ps (float *p, __m128 a) SIMD Floating-Point Exceptions None. Protected Mode Exceptions #GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment. 3-604 Vol. 2 INSTRUCTION SET REFERENCE, A-M #SS(0) #PF(fault-code) #NM #UD For an illegal address in the SS segment. For a page fault. If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. Real-Address Mode Exceptions #GP(0) If a memory operand is not aligned on a 16-byte boundary, regardless of segment. If any part of the operand lies outside the effective address space from 0 to FFFFH. #NM #UD If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. Virtual-8086 Mode Exceptions Same exceptions as in Real Address Mode #PF(fault-code) For a page fault. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #SS(0) #GP(0) If a memory address referencing the SS segment is in a noncanonical form. If the memory address is in a non-canonical form. If memory operand is not aligned on a 16-byte boundary, regardless of segment. #PF(fault-code) #NM #UD For a page fault. If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. Vol. 2 3-605 INSTRUCTION SET REFERENCE, A-M MOVD/MOVQ--Move Doubleword/Move Quadword Opcode 0F 6E /r REX.W + 0F 6E /r 0F 7E /r REX.W + 0F 7E /r 66 0F 6E /r REX.W + 66 0F 6E /r 66 0F 7E /r REX.W + 66 0F 7E /r Instruction MOVD mm, r/m32 MOVQ mm, r/m64 MOVD r/m32, mm MOVQ r/m64, mm MOVD xmm, r/m32 MOVQ xmm, r/m64 MOVD r/m32, xmm MOVQ r/m64, xmm 64-Bit Mode Valid Valid Valid Valid Valid Valid Valid Valid Compat/ Leg Mode Valid N.E. Valid N.E. Valid N.E. Valid N.E. Description Move doubleword from r/m32 to mm. Move quadword from r/m64 to mm. Move doubleword from mm to r/m32. Move quadword from mm to r/m64. Move doubleword from r/m32 to xmm. Move quadword from r/m64 to xmm. Move doubleword from xmm register to r/m32. Move quadword from xmm register to r/m64. Description Copies a doubleword from the source operand (second operand) to the destination operand (first operand). The source and destination operands can be generalpurpose registers, MMX technology registers, XMM registers, or 32-bit memory locations. This instruction can be used to move a doubleword to and from the low doubleword of an MMX technology register and a general-purpose register or a 32-bit memory location, or to and from the low doubleword of an XMM register and a general-purpose register or a 32-bit memory location. The instruction cannot be used to transfer data between MMX technology registers, between XMM registers, between general-purpose registers, or between memory locations. When the destination operand is an MMX technology register, the sou...
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