ia-32_instruction-set-ref_a-m

Valid valid ne valid description move if not carry cf0

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Unformatted text preview: , r/m32 CMOVNZ r64, r/m64 CMOVO r16, r/m16 CMOVO r32, r/m32 CMOVO r64, r/m64 CMOVP r16, r/m16 CMOVP r32, r/m32 CMOVP r64, r/m64 CMOVPE r16, r/m16 CMOVPE r32, r/m32 CMOVPE r64, r/m64 64-Bit Mode Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Compat/ Leg Mode N.E. Valid Valid N.E. Valid Valid N.E. Valid Valid N.E. Valid Valid N.E. Valid Valid N.E. Valid Valid N.E. Description Move if not overflow (OF=0). Move if not parity (PF=0). Move if not parity (PF=0). Move if not parity (PF=0). Move if not sign (SF=0). Move if not sign (SF=0). Move if not sign (SF=0). Move if not zero (ZF=0). Move if not zero (ZF=0). Move if not zero (ZF=0). Move if overflow (OF=0). Move if overflow (OF=0). Move if overflow (OF=0). Move if parity (PF=1). Move if parity (PF=1). Move if parity (PF=1). Move if parity even (PF=1). Move if parity even (PF=1). Move if parity even (PF=1). 3-118 Vol. 2 INSTRUCTION SET REFERENCE, A-M Opcode 0F 4B /r 0F 4B /r REX.W + 0F 4B /r 0F 48 /r 0F 48 /r REX.W + 0F 48 /r 0F 44 /r 0F 44 /r REX.W + 0F 44 /r Instruction CMOVPO r16, r/m16 CMOVPO r32, r/m32 CMOVPO r64, r/m64 CMOVS r16, r/m16 CMOVS r32, r/m32 CMOVS r64, r/m64 CMOVZ r16, r/m16 CMOVZ r32, r/m32 CMOVZ r64, r/m64 64-Bit Mode Valid Valid Valid Valid Valid Valid Valid Valid Valid Compat/ Leg Mode Valid Valid N.E. Valid Valid N.E. Valid Valid N.E. Description Move if parity odd (PF=0). Move if parity odd (PF=0). Move if parity odd (PF=0). Move if sign (SF=1). Move if sign (SF=1). Move if sign (SF=1). Move if zero (ZF=1). Move if zero (ZF=1). Move if zero (ZF=1). Description The CMOVcc instructions check the state of one or more of the status flags in the EFLAGS register (CF, OF, PF, SF, and ZF) and perform a move operation if the flags are in a specified state (or condition). A condition code (cc) is associated with each instruction to indicate the condition being tested for. If the condition is not satisfied, a move is not performed and execution continues with the instruction following the CMOVcc instruction. These instructions can move 16-bit, 32-bit or 64-bit values from memory to a general-purpose register or from one general-purpose register to another. Conditional moves of 8-bit register operands are not supported. The condition for each CMOVcc mnemonic is given in the description column of the above table. The terms "less" and "greater" are used for comparisons of signed integers and the terms "above" and "below" are used for unsigned integers. Because a particular state of the status flags can sometimes be interpreted in two ways, two mnemonics are defined for some opcodes. For example, the CMOVA (conditional move if above) instruction and the CMOVNBE (conditional move if not below or equal) instruction are alternate mnemonics for the opcode 0F 47H. The CMOVcc instructions were introduced in P6 family processors; however, these instructions may not be supported by all IA-32 process...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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