ia-32_instruction-set-ref_a-m

Ia-32_instruction-set-ref_a-m

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Unformatted text preview: rm. If the memory address is in a non-canonical form. If memory operand is not aligned on a 16-byte boundary, regardless of segment. #PF(fault-code) #NM #UD For a page fault. If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.SSE3(ECX, bit 0) is 0. Vol. 2 3-667 INSTRUCTION SET REFERENCE, A-M MOVSS--Move Scalar Single-Precision Floating-Point Values Opcode F3 0F 10 /r Instruction MOVSS xmm1, xmm2/m32 MOVSS xmm2/m32, xmm 64-Bit Mode Valid Compat/ Leg Mode Valid Description Move scalar single-precision floating-point value from xmm2/m32 to xmm1 register. Move scalar single-precision floating-point value from xmm1 register to xmm2/m32. F3 0F 11 /r Valid Valid Description Moves a scalar single-precision floating-point value from the source operand (second operand) to the destination operand (first operand). The source and destination operands can be XMM registers or 32-bit memory locations. This instruction can be used to move a single-precision floating-point value to and from the low doubleword of an XMM register and a 32-bit memory location, or to move a single-precision floating-point value between the low doublewords of two XMM registers. The instruction cannot be used to transfer data between memory locations. When the source and destination operands are XMM registers, the three high-order doublewords of the destination operand remain unchanged. When the source operand is a memory location and destination operand is an XMM registers, the three high-order doublewords of the destination operand are cleared to all 0s. In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15). Operation MOVSS instruction when source and destination operands are XMM registers: DEST[31:0] SRC[31:0]; (* DEST[127:32] remains unchanged *) MOVSS instruction when source operand is XMM register and destination operand is memory location: DEST SRC[31:0]; MOVSS instruction when source operand is memory location and destination operand is XMM register: DEST[31:0] SRC; DEST[127:32] 000000000000000000000000H; 3-668 Vol. 2 INSTRUCTION SET REFERENCE, A-M Intel C/C++ Compiler Intrinsic Equivalent MOVSS MOVSS MOVSS __m128 _mm_load_ss(float * p) void_mm_store_ss(float * p, __m128 a) __m128 _mm_move_ss(__m128 a, __m128 b) SIMD Floating-Point Exceptions None. Protected Mode Exceptions #GP(0) #SS(0) #PF(fault-code) #NM #UD For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. For an illegal address in the SS segment. For a page fault. If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. #AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions GP(0) #NM #UD If any part of the operand lies outside the effective address space from 0 to FFFFH. If CR0.TS[bit 3] = 1. If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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