ia-32_instruction-set-ref_a-m

A 32 bit operand size using by the following

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Unformatted text preview: . See the summary chart at the beginning of this section for encoding data and limits. Operation CF Bit(BitBase, BitOffset); Flags Affected The CF flag contains the value of the selected bit. The OF, SF, ZF, AF, and PF flags are undefined. Protected Mode Exceptions #GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector. #SS(0) #PF(fault-code) #AC(0) If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions #GP #SS If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. Vol. 2 3-75 INSTRUCTION SET REFERENCE, A-M Virtual-8086 Mode Exceptions #GP(0) #SS(0) #PF(fault-code) #AC(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #SS(0) #GP(0) #PF(fault-code) #AC(0) If a memory address referencing the SS segment is in a noncanonical form. If the memory address is in a non-canonical form. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. 3-76 Vol. 2 INSTRUCTION SET REFERENCE, A-M BTC--Bit Test and Complement Opcode 0F BB 0F BB REX.W + 0F BB 0F BA /7 ib 0F BA /7 ib REX.W + 0F BA /7 ib Instruction BTC r/m16, r16 BTC r/m32, r32 BTC r/m64, r64 BTC r/m16, imm8 BTC r/m32, imm8 BTC r/m64, imm8 64Bit Mode Valid Valid Valid Valid Valid Valid Compat/ Leg Mode Valid Valid N.E. Valid Valid N.E. Description Store selected bit in CF flag and complement. Store selected bit in CF flag and complement. Store selected bit in CF flag and complement. Store selected bit in CF flag and complement. Store selected bit in CF flag and complement. Store selected bit in CF flag and complement. Description Selects the bit in a bit string (specified with the first operand, called the bit base) at the bit-position designated by the bit offset operand (second operand), stores the value of the bit in the CF flag, and complements the selected bit in the bit string. The bit base operand can be a register or a memory location; the bit offset operand can be a register or an immediate value: If the bit base operand specifies a register, the instruction takes the modulo 16, 32, or 64 of the bit offset operand (modulo size depends on the mode and register size; 64-bit operands are available only in 64-bit mode). This allows any bit position to be selected. If the bit base operand specifies a memory location, the operand represen...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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