ia-32_instruction-set-ref_a-m

Ia-32_instruction-set-ref_a-m

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Unformatted text preview: 1 THEN #GP(new code segment selector); FI; IF code segment is conforming or code segment DPL = CPL THEN GOTO INTRA-PRIVILEGE-LEVEL-INTERRUPT; ELSE #GP(CodeSegmentSelector + EXT); (* PE = 1, interrupt or trap gate, nonconforming code segment, DPL > CPL *) FI; FI; END; INTER-PRIVILEGE-LEVEL-INTERRUPT: (* PE = 1, interrupt or trap gate, non-conforming code segment, DPL < CPL *) (* Check segment selector and descriptor for stack of new privilege level in current TSS *) IF current TSS is 32-bit TSS THEN TSSstackAddress (new code segment DPL 8) + 4; IF (TSSstackAddress + 7) > TSS limit THEN #TS(current TSS selector); FI; NewSS TSSstackAddress + 4; NewESP stack address; ELSE IF current TSS is 16-bit TSS THEN(* TSS is 16-bit *) TSSstackAddress (new code segment DPL 4) + 2 IF (TSSstackAddress + 4) > TSS limit THEN #TS(current TSS selector); FI; NewESP TSSstackAddress; NewSS TSSstackAddress + 2; ELSE (* TSS is 64-bit *) 3-470 Vol. 2 INSTRUCTION SET REFERENCE, A-M NewESP TSS[RSP FOR NEW TARGET DPL]; NewSS 0; FI; FI; IF segment selector is NULL THEN #TS(EXT); FI; IF segment selector index is not within its descriptor table limits or segment selector's RPL DPL of code segment, THEN #TS(SS selector + EXT); FI; IF (IA32_EFER.LMA = 0) (* Not IA-32e mode *) Read segment descriptor for stack segment in GDT or LDT; IF stack segment DPL DPL of code segment, or stack segment does not indicate writable data segment THEN #TS(SS selector + EXT); FI; IF stack segment not present THEN #SS(SS selector + EXT); FI; FI IF 32-bit gate THEN IF new stack does not have room for 24 bytes (error code pushed) or 20 bytes (no error code pushed) THEN #SS(segment selector + EXT); FI; FI ELSE IF 16-bit gate THEN IF new stack does not have room for 12 bytes (error code pushed) or 10 bytes (no error code pushed); THEN #SS(segment selector + EXT); FI; ELSE (* 64-bit gate*) IF StackAddress is non-canonical THEN #SS(0);FI; FI; FI; IF (IA32_EFER.LMA = 0) (* Not IA-32e mode *) THEN IF instruction pointer is not within code segment limits THEN #GP(0); FI; SS:ESP TSS(NewSS:NewESP); (* Segment descriptor information also loaded *) ELSE IF instruction pointer points to non-canonical address THEN #GP(0); FI: Vol. 2 3-471 INSTRUCTION SET REFERENCE, A-M FI; IF 32-bit gate THEN CS:EIP Gate(CS:EIP); (* Segment descriptor information also loaded *) ELSE IF 16-bit gate THEN CS:IP Gate(CS:IP); (* Segment descriptor information also loaded *) ELSE (* 64-bit gate *) CS:RIP Gate(CS:RIP); (* Segment descriptor information also loaded *) FI; FI; IF 32-bit gate THEN Push(far pointer to old stack); (* Old SS and ESP, 3 words padded to 4 *) Push(EFLAGS); Push(far pointer to return instruction); (* Old CS and EIP, 3 words padded to 4 *) Push(ErrorCode); (* If needed, 4 bytes *) ELSE IF 16-bit gate THEN Push(far pointer to old stack); (* Old SS and SP, 2 words *) Push(EFLAGS(15-0]); Push(far pointer to return instruction); (* Old CS and IP, 2 words *) Push(ErrorCode); (* If needed, 2 bytes *) ELSE (* 64-b...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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