Unformatted text preview: X.W + 23 /r NOTES: * In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. Instruction AND AL, imm8 AND AX, imm16 AND EAX, imm32 AND RAX, imm32 AND r/m8, imm8 AND r/m8*, imm8 AND r/m16, imm16 AND r/m32, imm32 AND r/m64, imm32 AND r/m16, imm8 AND r/m32, imm8 AND r/m64, imm8 AND r/m8, r8 AND r/m8*, r8* AND r/m16, r16 AND r/m32, r32 AND r/m64, r64 AND r8, r/m8 AND r8*, r/m8* AND r16, r/m16 AND r32, r/m32 AND r64, r/m64 64-Bit Mode Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Valid Comp/Leg Mode Valid Valid Valid N.E. Valid N.E. Valid Valid N.E. Valid Valid N.E. Valid N.E. Valid Valid N.E. Valid N.E. Valid Valid N.E. Description AL AND imm8. AX AND imm16. EAX AND imm32. RAX AND imm32 signextended to 64-bits. r/m8 AND imm8. r/m64 AND imm8 (signextended). r/m16 AND imm16. r/m32 AND imm32. r/m64 AND imm32 sign extended to 64-bits. r/m16 AND imm8 (signextended). r/m32 AND imm8 (signextended). r/m64 AND imm8 (signextended). r/m8 AND r8. r/m64 AND r8 (signextended). r/m16 AND r16. r/m32 AND r32. r/m64 AND r32. r8 AND r/m8. r/m64 AND r8 (signextended). r16 AND r/m16. r32 AND r/m32. r64 AND r/m64. 3-52 Vol. 2 INSTRUCTION SET REFERENCE, A-M Description
Performs a bitwise AND operation on the destination (first) and source (second) operands and stores the result in the destination operand location. The source operand can be an immediate, a register, or a memory location; the destination operand can be a register or a memory location. (However, two memory operands cannot be used in one instruction.) Each bit of the result is set to 1 if both corresponding bits of the first and second operands are 1; otherwise, it is set to 0. This instruction can be used with a LOCK prefix to allow the it to be executed atomically. In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits. Operation
DEST DEST AND SRC; Flags Affected
The OF and CF flags are cleared; the SF, ZF, and PF flags are set according to the result. The state of the AF flag is undefined. Protected Mode Exceptions
#GP(0) If the destination operand points to a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector. #SS(0) #PF(fault-code) #AC(0) If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions
#GP #SS If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.
- Winter '11