Unformatted text preview: ns taken when exceptions occur. Table 3-3. Intel 64 and IA-32 General Exceptions
Vector No. 0 1 3 4 5 6 Name #DE--Divide Error #DB--Debug #BP--Breakpoint #OF--Overflow #BR--BOUND Range Exceeded #UD--Invalid Opcode (Undefined Opcode) #NM--Device Not Available (No Math Coprocessor) Source DIV and IDIV instructions. Any code or data reference. INT 3 instruction. INTO instruction. BOUND instruction. UD2 instruction or reserved opcode. Floating-point or WAIT/FWAIT instruction. Protected Mode1 Yes Yes Yes Yes Yes Yes Real Address Mode Yes Yes Yes Yes Yes Yes Virtual 8086 Mode Yes Yes Yes Yes Yes Yes 7 Yes Yes Yes Vol. 2 3-15 INSTRUCTION SET REFERENCE, A-M Table 3-3. Intel 64 and IA-32 General Exceptions (Contd.)
Vector No. 8 Name #DF--Double Fault Source Any instruction that can generate an exception, an NMI, or an INTR. Task switch or TSS access. Loading segment registers or accessing system segments. Stack operations and SS register loads. Any memory reference and other protection checks. Any memory reference. Protected Mode1 Yes Real Address Mode Yes Virtual 8086 Mode Yes 10 11 12 13 14 #TS--Invalid TSS #NP--Segment Not Present #SS--Stack Segment Fault #GP--General Protection2 #PF--Page Fault Yes Yes Yes Yes Yes Reserved Reserved Yes Yes Reserved Yes Yes Yes Yes Yes 16 17 18 19 #MF--Floating-Point Floating-point or WAIT/FWAIT Error (Math Fault) instruction. #AC--Alignment Check #MC--Machine Check #XM--SIMD Floating-Point Numeric Error Any data reference in memory. Model dependent machine check errors. SSE/SSE2/SSE3 floating-point instructions. Yes Yes Yes Yes Yes Reserved Yes Yes Yes Yes Yes Yes NOTES: 1. Apply to protected mode, compatibility mode, and 64-bit mode. 2. In the real-address mode, vector 13 is the segment overrun exception. 220.127.116.11 Real-Address Mode Exceptions Section The "Real-Address Mode Exceptions" section lists the exceptions that can occur when the instruction is executed in real-address mode (see Table 3-3). 18.104.22.168 Virtual-8086 Mode Exceptions Section The "Virtual-8086 Mode Exceptions" section lists the exceptions that can occur when the instruction is executed in virtual-8086 mode (see Table 3-3). 3-16 Vol. 2 INSTRUCTION SET REFERENCE, A-M 22.214.171.124 Floating-Point Exceptions Section The "Floating-Point Exceptions" section lists exceptions that can occur when an x87 FPU floating-point instruction is executed. All of these exception conditions result in a floating-point error exception (#MF, vector number 16) being generated. Table 3-4 associates a one- or two-letter mnemonic with the corresponding exception name. See "Floating-Point Exception Conditions" in Chapter 8 of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, for a detailed description of these exceptions. Table 3-4. x87 FPU Floating-Point Exceptions
Mnemonic #IS #IA #Z #D #O #U #P Name Floating-point invalid operation: - Stack overflow or underflow - Invalid arithmetic operation Floating-point divide-by-zero Float...
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- Winter '11
- X86, Intel corporation, Packed Single-Precision Floating-Point, Packed Double-Precision Floating-Point, single-precision floating-point values