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Unformatted text preview: e types of exceptions may provide error codes. An error code reports additional information about the error. An example of the notation used to show an exception and error code is shown below: #PF(fault code) This example refers to a page-fault exception under conditions where an error code naming a type of fault is reported. Under some conditions, exceptions which produce error codes may not be able to report an accurate code. In this case, the error code is zero, as shown below for a general-protection exception: #GP(0) 1.3.7 A New Syntax for CPUID, CR, and MSR Values Obtain feature flags, status, and system information by using the CPUID instruction, by checking control register bits, and by reading model-specific registers. We are moving toward a new syntax to represent this information. See Figure 1-2. 1-6 Vol. 2 ABOUT THIS MANUAL Figure 1-2. Syntax for CPUID, CR, and MSR Data Presentation 1.4 RELATED LITERATURE Literature related to Intel 64 and IA-32 processors is listed on-line at: http://developer.intel.com/products/processor/index.htm Some of the documents listed at this web site can be viewed on-line; others can be ordered. The literature available is listed by Intel processor and then by the following literature types: applications notes, data sheets, manuals, papers, and specification updates. Vol. 2 1-7 ABOUT THIS MANUAL See also: The data sheet for a particular Intel 64 or IA-32 processor The specification update for a particular Intel 64 or IA-32 processor Intel C++ Compiler documentation and online help http://www3.intel.com/cd/software/products/asmo-na/eng/index.htm Intel Fortran Compiler documentation and online help http://www3.intel.com/cd/software/products/asmo-na/eng/index.htm Intel VTuneTM Performance Analyzer documentation and online help http://www3.intel.com/cd/software/products/asmo-na/eng/index.htm Intel 64 and IA-32 Architectures Software Developer's Manual (in five volumes) http://developer.intel.com/products/processor/manuals/index.htm Intel 64 and IA-32 Architectures Optimization Reference Manual http://developer.intel.com/products/processor/manuals/index.htm Intel Processor Identification with the CPUID Instruction, AP-485 http://www.intel.com/support/processors/sb/cs-009861.htm Developing Multi-threaded Applications: A Platform Consistent Approach http://cache-www.intel.com/cd/00/00/05/15/51534_developing_multithreaded _applications.pdf Using Spin-Loops on Intel Pentium 4 Processor and Intel Xeon Processor MP http://www3.intel.com/cd/ids/developer/asmona/eng/dc/threading/knowledgebase/19083.htm Software network link: http://softwarecommunity.intel.com/isn/home/ Developer centers: http://www3.intel.com/cd/ids/developer/asmo-na/eng/dc/index.htm Processor support general link: http://www.intel.com/support/processors/ Software products and packages: http://www3.intel.com/cd/software/products/asmo-na/eng/index.htm Hyper-Threading Technology (HT Technology): http://developer.intel.com/technology/hyperthread/ More relevant...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.
- Winter '11