ia-32_instruction-set-ref_a-m

Is outside the ss segment limit cr0embit 2 or cr0tsbit

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Unformatted text preview: table below). If no operand is specified, the contents of registers ST(0) and ST(1) are compared. The sign of zero is ignored, so that 0.0 is equal to +0.0. Table 3-46. FUCOM/FUCOMP/FUCOMPP Results Comparison Results* ST0 > ST(i) ST0 < ST(i) ST0 = ST(i) Unordered C3 0 0 1 1 C2 0 0 0 1 C0 0 1 0 1 NOTES: * Flags not set if unmasked invalid-arithmetic-operand (#IA) exception is generated. An unordered comparison checks the class of the numbers being compared (see "FXAM--ExamineModR/M" in this chapter). The FUCOM/FUCOMP/FUCOMPP instructions perform the same operations as the FCOM/FCOMP/FCOMPP instructions. The only difference is that the FUCOM/FUCOMP/FUCOMPP instructions raise the invalidarithmetic-operand exception (#IA) only when either or both operands are an SNaN or are in an unsupported format; QNaNs cause the condition code flags to be set to unordered, but do not cause an exception to be generated. The FCOM/FCOMP/FCOMPP instructions raise an invalid-operation exception when either or both of the operands are a NaN value of any kind or are in an unsupported format. As with the FCOM/FCOMP/FCOMPP instructions, if the operation results in an invalidarithmetic-operand exception being raised, the condition code flags are set only if the exception is masked. 3-406 Vol. 2 INSTRUCTION SET REFERENCE, A-M The FUCOMP instruction pops the register stack following the comparison operation and the FUCOMPP instruction pops the register stack twice following the comparison operation. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation CASE (relation of operands) OF ST > SRC: C3, C2, C0 000; ST < SRC: C3, C2, C0 001; ST = SRC: C3, C2, C0 100; ESAC; IF ST(0) or SRC = QNaN, but not SNaN or unsupported format THEN C3, C2, C0 111; ELSE (* ST(0) or SRC is SNaN or unsupported format *) #IA; IF FPUControlWord.IM = 1 THEN C3, C2, C0 111; FI; FI; IF Instruction = FUCOMP THEN PopRegisterStack; FI; IF Instruction = FUCOMPP THEN PopRegisterStack; FI; FPU Flags Affected C1 C0, C2, C3 Set to 0 if stack underflow occurred. See Table 3-46. Vol. 2 3-407 INSTRUCTION SET REFERENCE, A-M Floating-Point Exceptions #IS #IA Stack underflow occurred. One or both operands are SNaN values or have unsupported formats. Detection of a QNaN value in and of itself does not raise an invalid-operand exception. One or both operands are denormal values. #D Protected Mode Exceptions #NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. 3-408 Vol. 2 INSTRUCTION SET REFERENCE, A-M FXAM--ExamineModR/M Opcode D9 E5 Instruction FXAM 64-Bit Mode...
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