ia-32_instruction-set-ref_a-m

Is the lower bound of the array and the second

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Unformatted text preview: ity mode and legacy mode. It is not valid in 64-bit mode. Operation IF 64bit Mode THEN #UD; ELSE IF (ArrayIndex < LowerBound OR ArrayIndex > UpperBound) (* Below lower bound or above upper bound *) THEN #BR; FI; FI; Vol. 2 3-65 INSTRUCTION SET REFERENCE, A-M Flags Affected None. Protected Mode Exceptions #BR #UD #GP(0) If the bounds test fails. If second operand is not a memory location. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector. #SS(0) #PF(fault-code) #AC(0) If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions #BR #UD #GP #SS If the bounds test fails. If second operand is not a memory location. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. Virtual-8086 Mode Exceptions #BR #UD #GP(0) #SS(0) #PF(fault-code) #AC(0) If the bounds test fails. If second operand is not a memory location. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made. 3-66 Vol. 2 INSTRUCTION SET REFERENCE, A-M Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #UD If in 64-bit mode. Vol. 2 3-67 INSTRUCTION SET REFERENCE, A-M BSF--Bit Scan Forward Opcode 0F BC /r 0F BC /r REX.W + 0F BC Instruction BSF r16, r/m16 BSF r32, r/m32 BSF r64, r/m64 64-Bit Mode Valid Valid Valid Compat/ Leg Mode Valid Valid N.E. Description Bit scan forward on r/m16. Bit scan forward on r/m32. Bit scan forward on r/m64. Description Searches the source operand (second operand) for the least significant set bit (1 bit). If a least significant 1 bit is found, its bit index is stored in the destination operand (first operand). The source operand can be a register or a memory location; the destination operand is a register. The bit index is an unsigned offset from bit 0 of the source operand. If the content of the source operand is 0, the content of the destination operand is undefined. In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits. Operation IF SRC = 0 THEN ZF 1; DEST is undefined; ELSE ZF 0; temp 0; WHILE Bit(SRC, temp) = 0 DO temp temp + 1; DEST temp; OD; FI; Flags Affected The ZF flag is set to 1 if all the source operand is 0; otherwise, the ZF flag is cleared. The CF, OF, SF, AF, and PF, fla...
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