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Unformatted text preview: base) byte Instructions without ModR/M: the reg field of the opcode In 64-bit mode, these formats do not change. Bits needed to define fields in the 64-bit context are provided by the addition of REX prefixes. 2.2.1.2 More on REX Prefix Fields REX prefixes are a set of 16 opcodes that span one row of the opcode map and occupy entries 40H to 4FH. These opcodes represent valid instructions (INC or DEC) in IA-32 operating modes and in compatibility mode. In 64-bit mode, the same opcodes represent the instruction prefix REX and are not treated as individual instructions. The single-byte-opcode form of INC/DEC instruction not available in 64-bit mode. INC/DEC functionality is still available using ModR/M forms of the same instructions (opcodes FF/0 and FF/1). See Table 2-4 for a summary of the REX prefix format. Figure 2-4 though Figure 2-7 show examples of REX prefix fields in use. Some combinations of REX prefix fields are invalid. In such cases, the prefix is ignored. Some additional information follows: Setting REX.W can be used to determine the operand size but does not solely determine operand width. Like the 66H size prefix, 64-bit operand size override has no effect on byte-specific operations. For non-byte operations: if a 66H prefix is used with prefix (REX.W = 1), 66H is ignored. If a 66H override is used with REX and REX.W = 0, the operand size is 16 bits. REX.R modifies the ModR/M reg field when that field encodes a GPR, SSE, control or debug register. REX.R is ignored when ModR/M specifies other registers or defines an extended opcode. REX.X bit modifies the SIB index field. REX.B either modifies the base in the ModR/M r/m field or SIB base field; or it modifies the opcode reg field used for accessing GPRs. 2-10 Vol. 2 INSTRUCTION FORMAT Table 2-4. REX Prefix Fields [BITS: 0100WRXB] Field Name W R X B Bit Position 7:4 3 2 1 0 Definition 0100 0 = Operand size determined by CS.D 1 = 64 Bit Operand Size Extension of the ModR/M reg field Extension of the SIB index field Extension of the ModR/M r/m field, SIB base field, or Opcode reg field Figure 2-4. Memory Addressing Without an SIB Byte; REX.X Not Used Figure 2-5. Register-Register Addressing (No Memory Operand); REX.X Not Used Vol. 2 2-11 INSTRUCTION FORMAT Figure 2-6. Memory Addressing With a SIB Byte Figure 2-7. Register Operand Coded in Opcode Byte; REX.X & REX.R Not Used In the IA-32 architecture, byte registers (AH, AL, BH, BL, CH, CL, DH, and DL) are encoded in the ModR/M byte's reg field, the r/m field or the opcode reg field as registers 0 through 7. REX prefixes provide an additional addressing capability for byteregisters that makes the least-significant byte of GPRs available for byte operations. Certain combinations of the fields of the ModR/M byte and the SIB byte have special meaning for register encodings. For some combinations, fields expanded by the REX prefix are not decoded. Table 2-5 describes how each case behaves. 2-12 Vol. 2 INSTRUCTION FORMAT Table 2-5. Special...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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