ia-32_instruction-set-ref_a-m

Scaling factor determined by sib byte bits 6 and 7

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Unformatted text preview: I*4] [EDI*4] [EAX*8] [ECX*8] [EDX*8] [EBX*8] none [EBP*8] [ESI*8] [EDI*8] SS 00 Index 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 111 00 08 10 18 20 28 30 38 40 48 50 58 60 68 70 78 80 88 90 98 A0 A8 B0 B8 C0 C8 D0 D8 E0 E8 F0 F8 01 09 11 19 21 29 31 39 41 49 51 59 61 69 71 79 81 89 91 89 A1 A9 B1 B9 C1 C9 D1 D9 E1 E9 F1 F9 Value of SIB Byte (in Hexadecimal) 02 0A 12 1A 22 2A 32 3A 42 4A 52 5A 62 6A 72 7A 82 8A 92 9A A2 AA B2 BA C2 CA D2 DA E2 EA F2 FA 03 0B 13 1B 23 2B 33 3B 43 4B 53 5B 63 6B 73 7B 83 8B 93 9B A3 AB B3 BB C3 CB D3 DB E3 EB F3 FB 04 0C 14 1C 24 2C 34 3C 44 4C 54 5C 64 6C 74 7C 84 8C 94 9C A4 AC B4 BC C4 CC D4 DC E4 EC F4 FC 05 0D 15 1D 25 2D 35 3D 45 4D 55 5D 65 6D 75 7D 85 8D 95 9D A5 AD B5 BD C5 CD D5 DD E5 ED F5 FD 06 0E 16 1E 26 2E 36 3E 46 4E 56 5E 66 6E 76 7E 86 8E 96 9E A6 AE B6 BE C6 CE D6 DE E6 EE F6 FE 07 0F 17 1F 27 2F 37 3F 47 4F 57 5F 67 6F 77 7F 87 8F 97 9F A7 AF B7 BF C7 CF D7 DF E7 EF F7 FF 01 10 11 NOTES: 1. The [*] nomenclature means a disp32 with no base if the MOD is 00B. Otherwise, [*] means disp8 or disp32 + [EBP]. This provides the following address modes: MOD bits 00 01 10 Effective Address [scaled index] + disp32 [scaled index] + disp8 + [EBP] [scaled index] + disp32 + [EBP] 2-8 Vol. 2 INSTRUCTION FORMAT 2.2 IA-32E MODE IA-32e mode has two sub-modes. These are: Compatibility Mode. Enables a 64-bit operating system to run most legacy protected mode software unmodified. 64-Bit Mode. Enables a 64-bit operating system to run applications written to access 64-bit address space. 2.2.1 REX Prefixes REX prefixes are instruction-prefix bytes used in 64-bit mode. They do the following: Specify GPRs and SSE registers. Specify 64-bit operand size. Specify extended control registers. Not all instructions require a REX prefix in 64-bit mode. A prefix is necessary only if an instruction references one of the extended registers or uses a 64-bit operand. If a REX prefix is used when it has no meaning, it is ignored. Only one REX prefix is allowed per instruction. If used, the prefix must immediately precede the opcode byte or the two-byte opcode escape prefix (if present). Other placements are ignored. The instruction-size limit of 15 bytes still applies to instructions with a REX prefix. See Figure 2-3. Legacy Prefixes Grp 1, Grp 2, Grp 3, Grp 4 (optional) REX Prefix (optional) Opcode 1-, 2-, or 3-byte opcode ModR/M 1 byte (if required) SIB 1 byte (if required) Displacement Address displacement of 1, 2, or 4 bytes or none Immediate Immediate data of 1, 2, or 4 bytes or none Figure 2-3. Prefix Ordering in 64-bit Mode Vol. 2 2-9 INSTRUCTION FORMAT 2.2.1.1 Encoding Intel 64 and IA-32 instruction formats specify up to three registers by using 3-bit fields in the encoding, depending on the format: ModR/M: the reg and r/m fields of the ModR/M byte ModR/M with SIB: the reg field of the ModR/M byte, the base and index fields of the SIB (scale, index,...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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