ia-32_instruction-set-ref_a-m

Segment limit cr0embit 2 or cr0tsbit 3 1 virtual 8086

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Unformatted text preview: shows the results obtained when subtracting various classes of numbers from one another, assuming that neither overflow nor underflow occurs. Here, the DEST value is subtracted from the SRC value (SRC - DEST = result). When the difference between two operands of like sign is 0, the result is +0, except for the round toward - mode, in which case the result is -0. This instruction also guarantees that +0 - (-0) = +0, and that -0 - (+0) = -0. When the source operand is an integer 0, it is treated as a +0. When one operand is , the result is of the expected sign. If both operands are of the same sign, an invalid-operation exception is generated. Table 3-44. FSUBR/FSUBRP/FISUBR Results SRC - - -F or -I + F or 0 SRC SRC -F - -0 + -DEST 0 -0 -DEST - +0 + -DEST +0 0 -DEST - +F or +I + +F SRC SRC F or 0 - + + + + + + * NaN NaN NaN NaN NaN NaN NaN NaN NaN * - - - - - -F DEST -0 +0 +F + NaN NaN NaN NaN NaN NaN NOTES: F Means finite floating-point value. I Means integer. * Indicates floating-point invalid-arithmetic-operand (#IA) exception. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation IF Instruction = FISUBR THEN DEST ConvertToDoubleExtendedPrecisionFP(SRC) - DEST; ELSE (* Source operand is floating-point value *) DEST SRC - DEST; FI; IF Instruction = FSUBRP THEN PopRegisterStack; FI; Vol. 2 3-401 INSTRUCTION SET REFERENCE, A-M FPU Flags Affected C1 C0, C2, C3 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. Undefined. Floating-Point Exceptions #IS #IA #D #U #O #P Stack underflow occurred. Operand is an SNaN value or unsupported format. Operands are infinities of like sign. Source operand is a denormal value. Result is too small for destination format. Result is too large for destination format. Value cannot be represented exactly in destination format. Protected Mode Exceptions #GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. #SS(0) #NM #PF(fault-code) #AC(0) If a memory operand effective address is outside the SS segment limit. CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions #GP #SS #NM If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. CR0.EM[bit 2] or CR0.TS[bit 3] = 1. 3-402 Vol. 2 INSTRUCTION SET REFERENCE, A-M Virtual-8086 Mode Exceptions #GP(0) #SS(0) #NM #PF(fault-code) #AC(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is mad...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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