This preview shows page 1. Sign up to view the full content.
Unformatted text preview: xpression is commonly found in compound interest and annuity calculations. The result can be simply converted into a value in another logarithm base by including a scale factor in the ST(1) source operand. The following 3-430 Vol. 2 INSTRUCTION SET REFERENCE, A-M equation is used to calculate the scale factor for a particular logarithm base, where n is the logarithm base desired for the result of the FYL2XP1 instruction: scale factor logn 2 This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation
ST(1) ST(1) log2(ST(0) + 1.0); PopRegisterStack; FPU Flags Affected
C1 C0, C2, C3 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. Undefined. Floating-Point Exceptions
#IS #IA #D #U #O #P Stack underflow occurred. Either operand is an SNaN value or unsupported format. Source operand is a denormal value. Result is too small for destination format. Result is too large for destination format. Value cannot be represented exactly in destination format. Protected Mode Exceptions
#NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions
Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions
Same exceptions as in Protected Mode. Compatibility Mode Exceptions
Same exceptions as in Protected Mode. 64-Bit Mode Exceptions
Same exceptions as in Protected Mode. Vol. 2 3-431 INSTRUCTION SET REFERENCE, A-M HADDPD--Packed Double-FP Horizontal Add
Opcode 66 0F 7C /r Instruction HADDPD xmm1, xmm2/m128 64-Bit Mode Valid Compat/ Leg Mode Valid Description Horizontal add packed doubleprecision floating-point values from xmm2/m128 to xmm1. Description
Adds the double-precision floating-point values in the high and low quadwords of the destination operand and stores the result in the low quadword of the destination operand. Adds the double-precision floating-point values in the high and low quadwords of the source operand and stores the result in the high quadword of the destination operand. See Figure 3-10. Figure 3-10. HADDPD--Packed Double-FP Horizontal Add
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15). 3-432 Vol. 2 INSTRUCTION SET REFERENCE, A-M Operation
xmm1[63:0] = xmm1[63:0] + xmm1[127:64]; xmm1[127:64] = xmm2/m128[63:0] + xmm2/m128[127:64]; Intel C/C++ Compiler Intrinsic Equivalent
HADDPD __m128d _mm_hadd_pd(__m128d a, __m128d b) Exceptions
When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated. Numeric Exceptions
Overflow, Underflow, Invalid, Precision, Denormal. Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment. #SS(0) #PF(fault-code) #NM #XM #UD For an illegal address in the SS segment. For a page fault. If CR0.TS[bit 3] = 1. For an u...
View Full Document
This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.
- Winter '11