ia-32_instruction-set-ref_a-m

Than dpl if the ss register is being loaded and any

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Unformatted text preview: ss *) FI; ELSE IF OperandSize = 16 and AddressSize = 64 Vol. 2 3-529 INSTRUCTION SET REFERENCE, A-M THEN temp EffectiveAddress(SRC); (* 64-bit address *) DEST temp[0:15]; (* 16-bit address *) FI; ELSE IF OperandSize = 32 and AddressSize = 64 THEN temp EffectiveAddress(SRC); (* 64-bit address *) DEST temp[0:31]; (* 16-bit address *) FI; ELSE IF OperandSize = 64 and AddressSize = 64 THEN DEST EffectiveAddress(SRC); (* 64-bit address *) FI; FI; Flags Affected None. Protected Mode Exceptions #UD If source operand is not a memory location. Real-Address Mode Exceptions #UD If source operand is not a memory location. Virtual-8086 Mode Exceptions #UD If source operand is not a memory location. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #UD If source operand is not a memory location. 3-530 Vol. 2 INSTRUCTION SET REFERENCE, A-M LEAVE--High Level Procedure Exit Opcode C9 C9 C9 Instruction LEAVE LEAVE LEAVE 64-Bit Mode Valid N.E. Valid Compat/ Leg Mode Valid Valid N.E. Description Set SP to BP, then pop BP. Set ESP to EBP, then pop EBP. Set RSP to RBP, then pop RBP. Description Releases the stack frame set up by an earlier ENTER instruction. The LEAVE instruction copies the frame pointer (in the EBP register) into the stack pointer register (ESP), which releases the stack space allocated to the stack frame. The old frame pointer (the frame pointer for the calling procedure that was saved by the ENTER instruction) is then popped from the stack into the EBP register, restoring the calling procedure's stack frame. A RET instruction is commonly executed following a LEAVE instruction to return program control to the calling procedure. See "Procedure Calls for Block-Structured Languages" in Chapter 6 of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, for detailed information on the use of the ENTER and LEAVE instructions. In 64-bit mode, the instruction's default operation size is 64 bits; 32-bit operation cannot be encoded. See the summary chart at the beginning of this section for encoding data and limits. Operation IF StackAddressSize = 32 THEN ESP EBP; ELSE IF StackAddressSize = 64 THEN RSP RBP; FI; ELSE IF StackAddressSize = 16 THEN SP BP; FI; FI; IF OperandSize = 32 THEN EBP Pop(); ELSE IF OperandSize = 64 THEN RBP Pop(); FI; ELSE IF OperandSize = 16 THEN BP Pop(); FI; FI; Vol. 2 3-531 INSTRUCTION SET REFERENCE, A-M Flags Affected None. Protected Mode Exceptions #SS(0) #PF(fault-code) #AC(0) If the EBP register points to a location that is not within the limits of the current stack segment. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions #GP If the EBP register points to a location outside of the effective address space from 0 to FFFFH. Virtual-8086 Mode Exceptions #GP(0) #PF(fault-code) #AC(0) If the EBP register points to a location outside of the effectiv...
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