ia-32_instruction-set-ref_a-m

The first and second dwords of the destination

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Unformatted text preview: CTION SET REFERENCE, A-M HLT--Halt Opcode F4 Instruction HLT 64-Bit Mode Valid Compat/ Leg Mode Valid Description Halt Description Stops instruction execution and places the processor in a HALT state. An enabled interrupt (including NMI and SMI), a debug exception, the BINIT# signal, the INIT# signal, or the RESET# signal will resume execution. If an interrupt (including NMI) is used to resume execution after a HLT instruction, the saved instruction pointer (CS:EIP) points to the instruction following the HLT instruction. When a HLT instruction is executed on an Intel 64 or IA-32 processor supporting Hyper-Threading Technology, only the logical processor that executes the instruction is halted. The other logical processors in the physical processor remain active, unless they are each individually halted by executing a HLT instruction. The HLT instruction is a privileged instruction. When the processor is running in protected or virtual-8086 mode, the privilege level of a program or procedure must be 0 to execute the HLT instruction. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Operation Enter Halt state; Flags Affected None. Protected Mode Exceptions #GP(0) If the current privilege level is not 0. Real-Address Mode Exceptions None. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. Vol. 2 3-439 INSTRUCTION SET REFERENCE, A-M Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. 3-440 Vol. 2 INSTRUCTION SET REFERENCE, A-M HSUBPD--Packed Double-FP Horizontal Subtract Opcode 66 0F 7D /r Instruction HSUBPD xmm1, xmm2/m128 64-Bit Mode Valid Compat/ Leg Mode Valid Description Horizontal subtract packed doubleprecision floating-point values from xmm2/m128 to xmm1. Description The HSUBPD instruction subtracts horizontally the packed DP FP numbers of both operands. Subtracts the double-precision floating-point value in the high quadword of the destination operand from the low quadword of the destination operand and stores the result in the low quadword of the destination operand. Subtracts the double-precision floating-point value in the high quadword of the source operand from the low quadword of the source operand and stores the result in the high quadword of the destination operand. See Figure 3-12. Figure 3-12. HSUBPD--Packed Double-FP Horizontal Subtract In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15). Vol. 2 3-441 INSTRUCTION SET REFERENCE, A-M Operation xmm1[63:0] = xmm1[63:0] - xmm1[127:64]; xmm1[127:64] = xmm2/m128[63:0] - xmm2/m128[127:64]; Intel C/C++ Compiler Intrinsic Equivalent HSUBPD __m128d _mm_hsub_pd(__m128d a, __m128d b) Exceptions When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated. Numeric Exceptions Overflow, Underflow, Invalid, Precision, Denormal. Protected Mo...
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