ia-32_instruction-set-ref_a-m

The source operand bit 0 is set to 1 the instruction

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Unformatted text preview: ed. Instead, only the processor's cache is locked. Here, the processor's cache coherency mechanism insures that the operation is carried out atomically with regards to memory. See "Effects of a Locked Operation on Internal Processor Caches" in Chapter 7 of Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, the for more information on locking of caches. Vol. 2 3-541 INSTRUCTION SET REFERENCE, A-M Operation AssertLOCK#(DurationOfAccompaningInstruction); Flags Affected None. Protected Mode Exceptions #UD If the LOCK prefix is used with an instruction not listed in the "Description" section above. Other exceptions can be generated by the instruction that the LOCK prefix is being applied to. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. 3-542 Vol. 2 INSTRUCTION SET REFERENCE, A-M LODS/LODSB/LODSW/LODSD/LODSQ--Load String Opcode AC Instruction LODS m8 64-Bit Mode Valid Compat/ Leg Mode Valid Description For legacy mode, Load byte at address DS:(E)SI into AL. For 64-bit mode load byte at address (R)SI into AL. For legacy mode, Load word at address DS:(E)SI into AX. For 64-bit mode load word at address (R)SI into AX. For legacy mode, Load dword at address DS:(E)SI into EAX. For 64-bit mode load dword at address (R)SI into EAX. Load qword at address (R)SI into RAX. For legacy mode, Load byte at address DS:(E)SI into AL. For 64-bit mode load byte at address (R)SI into AL. For legacy mode, Load word at address DS:(E)SI into AX. For 64-bit mode load word at address (R)SI into AX. For legacy mode, Load dword at address DS:(E)SI into EAX. For 64-bit mode load dword at address (R)SI into EAX. Load qword at address (R)SI into RAX. AD LODS m16 Valid Valid AD LODS m32 Valid Valid REX.W + AD AC LODS m64 LODSB Valid Valid N.E. Valid AD LODSW Valid Valid AD LODSD Valid Valid REX.W + AD LODSQ Valid N.E. Description Loads a byte, word, or doubleword from the source operand into the AL, AX, or EAX register, respectively. The source operand is a memory location, the address of which is read from the DS:EDI or the DS:SI registers (depending on the address-size attribute of the instruction, 32 or 16, respectively). The DS segment may be overridden with a segment override prefix. At the assembly-code level, two forms of this instruction are allowed: the "explicitoperands" form and the "no-operands" form. The explicit-operands form (specified with the LODS mnemonic) allows the source operand to be specified explicitly. Here, the source operand should be a symbol that indicates the size and location of the source value. The destination operand is then automatically selected to match the size of the source operand (the AL register for byte operands, AX for word operands, and EAX for doubleword operands)....
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