Unformatted text preview: er 3, "Protected-Mode Memory Management," of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, for more information about the use of this instruction. Operation
IF 64-BIT MODE THEN See MOVSXD; ELSE IF DEST[RPL) < SRC[RPL) THEN ZF 1; DEST[RPL) SRC[RPL); Vol. 2 3-63 INSTRUCTION SET REFERENCE, A-M ELSE ZF 0; FI; FI; Flags Affected
The ZF flag is set to 1 if the RPL field of the destination operand is less than that of the source operand; otherwise, it is set to 0. Protected Mode Exceptions
#GP(0) If the destination is located in a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. #SS(0) #PF(fault-code) #AC(0) If a memory operand effective address is outside the SS segment limit. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Real-Address Mode Exceptions
#UD The ARPL instruction is not recognized in real-address mode. Virtual-8086 Mode Exceptions
#UD The ARPL instruction is not recognized in virtual-8086 mode. Compatibility Mode Exceptions
Same exceptions as in Protected Mode. 64-Bit Mode Exceptions
None. 3-64 Vol. 2 INSTRUCTION SET REFERENCE, A-M BOUND--Check Array Index Against Bounds
Opcode 62 /r Instruction BOUND r16, m16&16 64-Bit Mode Invalid Compat/ Leg Mode Valid Description Check if r16 (array index) is within bounds specified by m16&16. Check if r32 (array index) is within bounds specified by m16&16. 62 /r BOUND r32, m32&32 Invalid Valid Description
BOUND determines if the first operand (array index) is within the bounds of an array specified the second operand (bounds operand). The array index is a signed integer located in a register. The bounds operand is a memory location that contains a pair of signed doubleword-integers (when the operand-size attribute is 32) or a pair of signed word-integers (when the operand-size attribute is 16). The first doubleword (or word) is the lower bound of the array and the second doubleword (or word) is the upper bound of the array. The array index must be greater than or equal to the lower bound and less than or equal to the upper bound plus the operand size in bytes. If the index is not within bounds, a BOUND range exceeded exception (#BR) is signaled. When this exception is generated, the saved return instruction pointer points to the BOUND instruction. The bounds limit data structure (two words or doublewords containing the lower and upper limits of the array) is usually placed just before the array itself, making the limits addressable via a constant offset from the beginning of the array. Because the address of the array already will be present in a register, this practice avoids extra bus cycles to obtain the effective address of the array bounds. This instruction executes as described in compatibil...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.
- Winter '11