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Unformatted text preview: irtual-8086 Mode Exceptions #UD #GP(0) #GP If source operand is not a memory location. The LGDT and LIDT instructions are not recognized in virtual8086 mode. If the current privilege level is not 0. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #SS(0) #GP(0) #UD #PF(fault-code) If a memory address referencing the SS segment is in a noncanonical form. If the current privilege level is not 0. If the memory address is in a non-canonical form. If source operand is not a memory location. If a page fault occurs. 3-536 Vol. 2 INSTRUCTION SET REFERENCE, A-M LLDT--Load Local Descriptor Table Register Opcode 0F 00 /2 Instruction LLDT r/m16 64-Bit Mode Valid Compat/ Leg Mode Valid Description Load segment selector r/m16 into LDTR. Description Loads the source operand into the segment selector field of the local descriptor table register (LDTR). The source operand (a general-purpose register or a memory location) contains a segment selector that points to a local descriptor table (LDT). After the segment selector is loaded in the LDTR, the processor uses the segment selector to locate the segment descriptor for the LDT in the global descriptor table (GDT). It then loads the segment limit and base address for the LDT from the segment descriptor into the LDTR. The segment registers DS, ES, SS, FS, GS, and CS are not affected by this instruction, nor is the LDTR field in the task state segment (TSS) for the current task. If bits 2-15 of the source operand are 0, LDTR is marked invalid and the LLDT instruction completes silently. However, all subsequent references to descriptors in the LDT (except by the LAR, VERR, VERW or LSL instructions) cause a general protection exception (#GP). The operand-size attribute has no effect on this instruction. The LLDT instruction is provided for use in operating-system software; it should not be used in application programs. This instruction can only be executed in protected mode or 64-bit mode. In 64-bit mode, the operand size is fixed at 16 bits. Operation IF SRC(Offset) > descriptor table limit THEN #GP(segment selector); FI; IF segment selector is valid Read segment descriptor; IF SegmentDescriptor(Type) LDT THEN #GP(segment selector); FI; IF segment descriptor is not present THEN #NP(segment selector); FI; LDTR(SegmentSelector) SRC; LDTR(SegmentDescriptor) GDTSegmentDescriptor; Vol. 2 3-537 INSTRUCTION SET REFERENCE, A-M ELSE LDTR INVALID FI; Flags Affected None. Protected Mode Exceptions #GP(0) If the current privilege level is not 0. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector. #GP(selector) If the selector operand does not point into the Global Descriptor Table or if the entry in the GDT is not a Local Descriptor Table. Segment selector is beyond GDT limit. #SS(0) #NP(selector) #PF(fault-code) If a memory operand effective address is outside the SS segment limit....
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  • Winter '11
  • Watlins
  • X86, Intel corporation, Packed Single-Precision Floating-Point, Packed Double-Precision Floating-Point, single-precision floating-point values

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