ia-32_instruction-set-ref_a-m

When taking the sine and cosine of various classes of

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Unformatted text preview: T REFERENCE, A-M Floating-Point Exceptions #IS #IA #D #P Stack underflow occurred. Source operand is an SNaN value or unsupported format. Source operand is a negative value (except for -0). Source operand is a denormal value. Value cannot be represented exactly in destination format. Protected Mode Exceptions #NM #MF CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. Real-Address Mode Exceptions Same exceptions as in Protected Mode. Virtual-8086 Mode Exceptions Same exceptions as in Protected Mode. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions Same exceptions as in Protected Mode. Vol. 2 3-383 INSTRUCTION SET REFERENCE, A-M FST/FSTP--Store Floating Point Value Opcode D9 /2 DD /2 DD D0+i D9 /3 DD /3 DB /7 DD D8+i Instruction FST m32fp FST m64fp FST ST(i) FSTP m32fp FSTP m64fp FSTP m80fp FSTP ST(i) 64-Bit Mode Valid Valid Valid Valid Valid Valid Valid Compat/ Leg Mode Valid Valid Valid Valid Valid Valid Valid Description Copy ST(0) to m32fp. Copy ST(0) to m64fp. Copy ST(0) to ST(i). Copy ST(0) to m32fp and pop register stack. Copy ST(0) to m64fp and pop register stack. Copy ST(0) to m80fp and pop register stack. Copy ST(0) to ST(i) and pop register stack. Description The FST instruction copies the value in the ST(0) register to the destination operand, which can be a memory location or another register in the FPU register stack. When storing the value in memory, the value is converted to single-precision or doubleprecision floating-point format. The FSTP instruction performs the same operation as the FST instruction and then pops the register stack. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The FSTP instruction can also store values in memory in double extended-precision floating-point format. If the destination operand is a memory location, the operand specifies the address where the first byte of the destination value is to be stored. If the destination operand is a register, the operand specifies a register in the register stack relative to the top of the stack. If the destination size is single-precision or double-precision, the significand of the value being stored is rounded to the width of the destination (according to the rounding mode specified by the RC field of the FPU control word), and the exponent is converted to the width and bias of the destination format. If the value being stored is too large for the destination format, a numeric overflow exception (#O) is generated and, if the exception is unmasked, no value is stored in the destination operand. If the value being stored is a denormal value, the denormal exception (#D) is not generated. This condition is simply signaled as a numeric underflow exception (#U) condition. If the value being stored is 0, , or a NaN, the least-significant bits of the significand and the exponent are truncated to fit the destination format. This operation preserves the...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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