ia-32_volume1_basic-arch

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Unformatted text preview: d Control word Load environment Load log2e Load log210 Load log102 Load loge2 Load Load + 0.0 Multiply floating-point No operation Partial arctangent Partial remainder IEEE partial remainder Partial tangent Round to integer Restore state Save state Scale Sine Sine and cosine Square root Store floating-point Store floating-point Store control word Store environment Store status word Subtract floating-point Test Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y #IS #IA Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y #D #Z #O #U #P Vol. 1 C-3 FLOATING-POINT EXCEPTIONS SUMMARY Table C-2. Exceptions Generated with x87 FPU Floating-Point Instructions (Contd.) Mnemonic FUCOM(P)(P) FWAIT FXAM FXCH FXTRACT FYL2X FYL2XP1 Instruction Unordered compare floatingpoint CPU Wait Examine Exchange registers Extract Logarithm Logarithm epsilon Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y #IS #IA Y Y #D Y #Z #O #U #P C.3 SSE INSTRUCTIONS Table C-3 lists SSE instructions with at least one of the following characteristics: have floating-point operands generate floating-point results read or write floating-point status and control information The table also summarizes the floating-point exceptions that each instruction can generate. Table C-3. Exceptions Generated with SSE Instructions Mnemonic ADDPS ADDSS ANDNPS ANDPS CMPPS CMPSS COMISS Instruction Packed add. Scalar add. Packed logical INVERT and AND. Packed logical AND. Packed compare. Scalar compare. Scalar ordered compare lower SP FP numbers and set the status flags. Convert two 32-bit signed integers from MM2/Mem to two SP FP. Y Y Y Y Y Y #I Y Y #D Y Y #Z #O Y Y #U Y Y #P Y Y CVTPI2PS Y C-4 Vol. 1 FLOATING-POINT EXCEPTIONS SUMMARY Table C-3. Exceptions Generated with SSE Instructions (Contd.) Mnemonic CVTPS2PI Instruction Convert lower two SP FP from XMM/Mem to two 32-bit signed integers in MM using rounding specified by MXCSR. Convert one 32-bit signed integer from Integer Reg/Mem to one SP FP. Convert one SP FP from XMM/Mem to one 32-bit signed integer using rounding mode specified by MXCSR, and move the result to an integer register. Convert two SP FP from XMM2/Mem to two 32-bit signed integers in MM1 using truncate. Convert lowest SP FP from XMM/Mem to one 32-bit signed integer using truncate, and move the result to an integer register. Packed divide. Scalar divide. Load control/status word. Packed maximum. Scalar maximum. Packed minimum. Scalar minimum. Move four packed SP values. Move packed SP high to low. Move two packed SP values between memory and the high half of an XMM register. Move packed SP low to high. Y Y Y Y Y Y Y Y Y #I Y #D #Z #O #U #P Y CVTSI2SS Y CVTSS2SI Y CVTTPS2PI Y Y CVTTSS2SI Y Y DIVPS DIVSS LDMXCSR MAXPS MAXSS MINPS MINSS MOVAPS MOVHLPS MOVHPS Y Y Y Y Y Y Y Y Y Y Y Y MOVLHPS Vol. 1 C-5 FLOATING-POINT EXCEPTIONS SUMMARY Table C-3. Exceptions Generated with SSE Instructions (Contd.) Mnemonic MOVLPS Instruc...
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