ia-32_volume1_basic-arch

Ascii adjust after multiplication ascii adjust before

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Unformatted text preview: of range High-level procedure entry High-level procedure exit 5.1.8 String Instructions The string instructions operate on strings of bytes, allowing them to be moved to and from memory. MOVS/MOVSB MOVS/MOVSW MOVS/MOVSD CMPS/CMPSB CMPS/CMPSW CMPS/CMPSD SCAS/SCASB SCAS/SCASW SCAS/SCASD LODS/LODSB LODS/LODSW LODS/LODSD STOS/STOSB STOS/STOSW STOS/STOSD REP REPE/REPZ REPNE/REPNZ Move string/Move byte string Move string/Move word string Move string/Move doubleword string Compare string/Compare byte string Compare string/Compare word string Compare string/Compare doubleword string Scan string/Scan byte string Scan string/Scan word string Scan string/Scan doubleword string Load string/Load byte string Load string/Load word string Load string/Load doubleword string Store string/Store byte string Store string/Store word string Store string/Store doubleword string Repeat while ECX not zero Repeat while equal/Repeat while zero Repeat while not equal/Repeat while not zero 5.1.9 I/O Instructions These instructions move data between the processor's I/O ports and a register or memory. IN OUT INS/INSB INS/INSW INS/INSD Read from a port Write to a port Input string from port/Input byte string from port Input string from port/Input word string from port Input string from port/Input doubleword string from port 5-8 Vol. 1 INSTRUCTION SET SUMMARY OUTS/OUTSB OUTS/OUTSW OUTS/OUTSD Output string to port/Output byte string to port Output string to port/Output word string to port Output string to port/Output doubleword string to port 5.1.10 Enter and Leave Instructions These instructions provide machine-language support for procedure calls in blockstructured languages. ENTER LEAVE High-level procedure entry High-level procedure exit 5.1.11 STC CLC CMC CLD STD LAHF SAHF Flag Control (EFLAG) Instructions Set carry flag Clear the carry flag Complement the carry flag Clear the direction flag Set direction flag Load flags into AH register Store AH register into flags Push EFLAGS onto stack Pop EFLAGS from stack Set interrupt flag Clear the interrupt flag The flag control instructions operate on the flags in the EFLAGS register. PUSHF/PUSHFD POPF/POPFD STI CLI 5.1.12 Segment Register Instructions The segment register instructions allow far pointers (segment addresses) to be loaded into the segment registers. LDS LES LFS LGS LSS Load far pointer using DS Load far pointer using ES Load far pointer using FS Load far pointer using GS Load far pointer using SS Vol. 1 5-9 INSTRUCTION SET SUMMARY 5.1.13 Miscellaneous Instructions The miscellaneous instructions provide such functions as loading an effective address, executing a "no-operation," and retrieving processor identification information. LEA NOP UD2 XLAT/XLATB CPUID Load effective address No operation Undefined instruction Table lookup translation Processor Identification 5.2 X87 FPU INSTRUCTIONS The x87 FPU instructions are executed by the processor's x87 FPU. These instructions operate on floating-point, integer, an...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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