ia-32_volume1_basic-arch

Sse and sse2 state 11 30 saving xmm register state on

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Unformatted text preview: dental instruction accuracy, 8-31 Trap gate, 6-14 Truncation description of, 4-24 with SSE-SSE2 conversion instructions, 4-24 TSS I/O map base, 13-5 I/O permission bit map, 13-5 saving state of EFLAGS register, 3-20 U UCOMISD instruction, 11-10 UCOMISS instruction, 10-14 UD2 instruction, 7-32 UE (numeric underflow exception) flag MXCSR register, 11-22 x87 FPU status word, 8-7, 8-42 UM (numeric underflow exception) mask bit MXCSR register, 11-22 x87 FPU control word, 8-11, 8-42 Underflow FPU exception (see Numeric underflow exception) numeric, floating-point, 4-18 x87 FPU stack, 8-36, 8-37 Underflow, x87 FPU stack, 8-37 Unpack instructions SSE extensions, 10-14 SSE2 extensions, 11-10 UNPCKHPD instruction, 11-11 UNPCKHPS instruction, 10-14 INDEX-16 Vol. 1 INDEX UNPCKLPD instruction, 11-11 UNPCKLPS instruction, 10-15 Unsigned integers description of, 4-4 range of, 4-4 types, 4-4 Unsupported, 8-20 floating-point formats, x87 FPU, 8-20 x87 FPU instructions, 8-34 V Vector (see Interrupt vector) VIF (virtual interrupt) flag, EFLAGS register, 3-23 VIP (virtual interrupt pending) flag EFLAGS register, 3-23 Virtual 8086 mode description of, 3-23 memory model, 3-9, 3-10 VM (virtual 8086 mode) flag, EFLAGS register, 3-23 VMCALL instruction, 5-32 VMCLEAR instruction, 5-31 VMLAUNCH instruction, 5-32 VMPTRLD instruction, 5-31 VMPTRST instruction, 5-31 VMREAD instruction, 5-32 VMRESUME instruction, 5-32 VMWRITE instruction, 5-32 VMX instruction set, 5-31 introduction, 2-22 Virtual machine monitor (VMM), 2-22 virtualization, 2-22 VMXOFF instruction, 5-32 VMXON instruction, 5-32 W Waiting instructions, x87 FPU, 8-33 WAIT/FWAIT instructions, 8-33, 8-44 WC memory type, 10-18 wide dynamic execution, 2-6 Word, 4-1 Wraparound mode (MMX instructions), 9-5 X x87 FPU 64-bit mode, 8-2 compatibility mode, 8-2 control word, 8-10 data pointer, 8-13 data registers, 8-2 execution environment, 8-1 floating-point data types, 8-18 floating-point format, 4-13, 4-14 fopcode compatibility mode, 8-14 FXSAVE and FXRSTOR instructions, 11-34 IEEE Standard 754, 8-1 instruction pointer, 8-13 instruction set, 8-22 last instruction opcode, 8-14 overview of registers, 3-3 programming, 8-1 QNaN floating-point indefinite, 4-22 register stack, 8-2 register stack, parameter passing, 8-5 registers, 8-1 save and restore state instructions, 5-13 saving registers, 11-34 state, 8-15 state, image, 8-16, 8-17 state, saving, 8-15, 8-17 status register, 8-6 tag word, 8-12 transcendental instruction accuracy, 8-31 x87 FPU control word description of, 8-10 exception-flag mask bits, 8-11 infinity control flag, 8-12 precision control (PC) field, 8-11 rounding control (RC) field, 4-23, 8-12 x87 FPU exception handling description of, 8-45 floating-point exception summary, C-2 MS-DOS compatibility mode, 8-45 native mode, 8-45 x87 FPU floating-point exceptions denormal operand exception, 8-39 division-by-zero, 8-40 exception conditions, 8-36 exception summary, C-2 guidelines for writing exception handlers, D-1 inexac...
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