ia-32_volume1_basic-arch

Setting of 1 of 0 cf 1 cf 0 zf 1 zf 0 cf or zf

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Unformatted text preview: tion Move two packed SP values between memory and the low half of an XMM register. Move sign mask to r32. Move scalar SP number between an XMM register and memory or a second XMM register. Move unaligned packed data. Packed multiply. Scalar multiply. Packed OR. Packed reciprocal. Scalar reciprocal. Packed reciprocal square root. Scalar reciprocal square root. Shuffle. Square Root of the packed SP FP numbers. Scalar square roo. Store control/status word. Packed subtract. Scalar subtract. Unordered compare lower SP FP numbers and set the status flags. Interleave SP FP numbers. Interleave SP FP numbers. Packed XOR. Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y #I #D #Z #O #U #P MOVMSKPS MOVSS MOVUPS MULPS MULSS ORPS RCPPS RCPSS RSQRTPS RSQRTSS SHUFPS SQRTPS SQRTSS STMXCSR SUBPS SUBSS UCOMISS UNPCKHPS UNPCKLPS XORPS C-6 Vol. 1 FLOATING-POINT EXCEPTIONS SUMMARY C.4 SSE2 INSTRUCTIONS Table C-4 lists SSE2 instructions with at least one of the following characteristics: floating-point operands floating point results For each instruction, the table summarizes the floating-point exceptions that the instruction can generate. Table C-4. Exceptions Generated with SSE2 Instructions Instruction ADDPD Description Add two packed DP FP numbers from XMM2/Mem to XMM1. Add the lower DP FP number from XMM2/Mem to XMM1. Invert the 128 bits in XMM1and then AND the result with 128 bits from XMM2/Mem. Logical And of 128 bits from XMM2/Mem to XMM1 register. Compare packed DP FP numbers from XMM2/Mem to packed DP FP numbers in XMM1 register using imm8 as predicate. Compare lowest DP FP number from XMM2/Mem to lowest DP FP number in XMM1 register using imm8 as predicate. Compare lower DP FP number in XMM1 register with lower DP FP number in XMM2/Mem and set the status flags accordingly Convert four 32-bit signed integers from XMM/Mem to four SP FP. Convert four SP FP from XMM/Mem to four 32-bit signed integers in XMM using rounding specified by MXCSR. Y Y Y #I Y #D Y #Z #O Y #U Y #P Y ADDSD ANDNPD Y Y Y Y Y ANDPD CMPPD CMPSD Y Y COMISD Y Y CVTDQ2PS Y CVTPS2DQ Y Vol. 1 C-7 FLOATING-POINT EXCEPTIONS SUMMARY Table C-4. Exceptions Generated with SSE2 Instructions (Contd.) Instruction CVTTPS2DQ Description Convert four SP FP from XMM/Mem to four 32-bit signed integers in XMM using truncate. Convert two 32-bit signed integers in XMM2/Mem to 2 DP FP in xmm1 using rounding specified by MXCSR. Convert two DP FP from XMM2/Mem to two 32-bit signed integers in xmm1 using rounding specified by MXCSR. Convert lower two DP FP from XMM/Mem to two 32-bit signed integers in MM using rounding specified by MXCSR. Convert two DP FP to two SP FP. Convert two 32-bit signed integers from MM2/Mem to two DP FP. Convert two SP FP to two DP FP. Convert one DP FP from XMM/Mem to one 32 bit signed integer using rounding mode specified by MXCSR, and move the result to an integer register. Convert scalar DP FP to scalar SP FP. Convert one 32-bit signed integer from Integer Reg/Mem to one DP FP. Conv...
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