ia-32_volume1_basic-arch

A valid bcd result these instructions operate on both

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Unformatted text preview: , SAR (shift arithmetic right), SHR (shift logical right) instructions perform an arithmetic or logical shift of the bits in a byte, word, or doubleword. The SAL and SHL instructions perform the same operation (see Figure 7-6). They shift the source operand left by from 1 to 31 bit positions. Empty bit positions are cleared. The CF flag is loaded with the last bit shifted out of the operand. 7-14 Vol. 1 PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS Initial State CF X Operand 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 After 1-bit SHL/SAL Instruction 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 0 After 10-bit SHL/SAL Instruction 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 Figure 7-6. SHL/SAL Instruction Operation The SHR instruction shifts the source operand right by from 1 to 31 bit positions (see Figure 7-7). As with the SHL/SAL instruction, the empty bit positions are cleared and the CF flag is loaded with the last bit shifted out of the operand. Initial State Operand CF X 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 After 1-bit SHR Instruction 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 After 10-bit SHR Instruction 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 Figure 7-7. SHR Instruction Operation The SAR instruction shifts the source operand right by from 1 to 31 bit positions (see Figure 7-8). This instruction differs from the SHR instruction in that it preserves the sign of the source operand by clearing empty bit positions if the operand is positive or setting the empty bits if the operand is negative. Again, the CF flag is loaded with the last bit shifted out of the operand. Vol. 1 7-15 0 0 PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS The SAR and SHR instructions can also be used to perform division by powers of 2 (see "SAL/SAR/SHL/SHR--Shift Instructions" in Chapter 4, "Instruction Set Reference, N-Z," of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2B). Initial State (Positive Operand) Operand CF X 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 After 1-bit SAR Instruction 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 Initial State (Negative Operand) 1 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 CF X After 1-bit SAR Instruction 1 1 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 Figure 7-8. SAR Instruction Operation 7.3.6.2 Double-Shift Instructions The SHLD (shift left double) and SHRD (shift right double) instructions shift a specified number of bits from one operand to another (see Figure 7-9). They are provided to facilitate operations on unaligned bit strings. They can also be used to implement a variety of bit string move operations. 7-16 Vol. 1 PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS 31 CF 31 SHLD Instruction Destination (Memory or Register) 0 0 Source (Register) SHRD Instruction Source (Register...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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