Unformatted text preview: es, by default, use the SS segment register. These include PUSH/POP-related instructions and instructions using RSP/RBP as base registers. In these cases, the canonical fault is #SF. If an instruction uses base registers RSP/RBP and uses a segment override prefix to specify a non-SS segment, a canonical fault generates a #GP (instead of an #SF). In 64-bit mode, only FS and GS segment-overrides are applicable in this situation. Other segment override prefixes (CS, DS, ES and SS) are ignored. Note that this also means that an SS segment-override applied to a "non-stack" register reference is ignored. Such a sequence still produces a #GP for a canonical fault (and not an #SF). 3.4 BASIC PROGRAM EXECUTION REGISTERS IA-32 architecture provides 16 basic program execution registers for use in general system and application programing (see Figure 3-4). These registers can be grouped as follows: General-purpose registers. These eight registers are available for storing operands and pointers. Segment registers. These registers hold up to six segment selectors. Vol. 1 3-13 BASIC EXECUTION ENVIRONMENT EFLAGS (program status and control) register. The EFLAGS register report on the status of the program being executed and allows limited (applicationprogram level) control of the processor. EIP (instruction pointer) register. The EIP register contains a 32-bit pointer to the next instruction to be executed. 3.4.1 General-Purpose Registers The 32-bit general-purpose registers EAX, EBX, ECX, EDX, ESI, EDI, EBP, and ESP are provided for holding the following items: Operands for logical and arithmetic operations Operands for address calculations Memory pointers Although all of these registers are available for general storage of operands, results, and pointers, caution should be used when referencing the ESP register. The ESP register holds the stack pointer and as a general rule should not be used for another purpose. Many instructions assign specific registers to hold operands. For example, string instructions use the contents of the ECX, ESI, and EDI registers as operands. When using a segmented memory model, some instructions assume that pointers in certain registers are relative to specific segments. For instance, some instructions assume that a pointer in the EBX register points to a memory location in the DS segment. 3-14 Vol. 1 BASIC EXECUTION ENVIRONMENT 31 General-Purpose Registers 0 EAX EBX ECX EDX ESI EDI EBP ESP Segment Registers 0 15 CS DS SS ES FS GS Program Status and Control Register 0 31 EFLAGS 31 Instruction Pointer 0 EIP Figure 3-4. General System and Application Programming Registers
The special uses of general-purpose registers by instructions are described in Chapter 5, "Instruction Set Summary," in this volume. See also: Chapter 3 and Chapter 4 of Intel 64 and IA-32 Architectures Software Developer's Manual, Volumes 2A & 2B. The following is a summary of special uses: EAX -- Accumulator for operands and results data EB...
View Full Document
- Winter '11
- X86, Intel corporation, 64-bit mode, fpu floating-point exception, FPU Control Instructions