ia-32_volume1_basic-arch

Arithmetic instructions some unpack instructions 32

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Unformatted text preview: Saturation Data Type Signed Byte Signed Word Unsigned Byte Unsigned Word Lower Limit Hexadecimal 80H 8000H 00H 0000H Decimal -128 -32,768 0 0 Upper Limit Hexadecimal 7FH 7FFFH FFH FFFFH Decimal 127 32,767 255 65,535 Saturation arithmetic provides an answer for many overflow situations. For example, in color calculations, saturation causes a color to remain pure black or pure white without allowing inversion. It also prevents wraparound artifacts from entering into computations when range checking of source operands it not used. MMX instructions do not indicate overflow or underflow occurrence by generating exceptions or setting flags in the EFLAGS register. 9.4 MMX INSTRUCTIONS The MMX instruction set consists of 47 instructions, grouped into the following categories: Data transfer Arithmetic Comparison Conversion Unpacking Logical Shift Empty MMX state instruction (EMMS) Table 9-2 gives a summary of the instructions in the MMX instruction set. The following sections give a brief overview of the instructions within each group. 9-6 Vol. 1 PROGRAMMING WITH INTEL MMXTM TECHNOLOGY NOTES The MMX instructions described in this chapter are those instructions that are available in an IA-32 processor when CPUID.01H:EDX.MMX[bit 23] = 0. Section 10.4.4, "SSE 64-Bit SIMD Integer Instructions," and Section 11.4.2, "SSE2 64-Bit and 128-Bit SIMD Integer Instructions," list additional instructions included with SSE/SSE2 extensions that operate on the MMX registers but are not considered part of the MMX instruction set. Table 9-2. MMX Instruction Set Summary Category Arithmetic Addition Subtraction Multiplication Multiply and Add Comparison Wraparound PADDB, PADDW, PADDD PSUBB, PSUBW, PSUBD PMULL, PMULH PMADD Signed Saturation Unsigned Saturation PADDSB, PADDSW PADDUSB, PADDUSW PSUBSB, PSUBSW PSUBUSB, PSUBUSW Compare for Equal PCMPEQB, PCMPEQW, PCMPEQD Compare for PCMPGTPB, Greater Than PCMPGTPW, PCMPGTPD Pack Unpack High Unpack Low PUNPCKHBW, PUNPCKHWD, PUNPCKHDQ PUNPCKLBW, PUNPCKLWD, PUNPCKLDQ Packed Full Quadword PAND PANDN POR PXOR PSLLW, PSLLD PSRLW, PSRLD PSRAW, PSRAD PSLLQ PSRLQ PACKSSWB, PACKSSDW PACKUSWB Conversion Unpack Logical And And Not Or Exclusive OR Shift Left Logical Shift Right Logical Shift Right Arithmetic Shift Vol. 1 9-7 PROGRAMMING WITH INTEL MMXTM TECHNOLOGY Table 9-2. MMX Instruction Set Summary (Contd.) Category Wraparound Signed Saturation Unsigned Saturation Quadword Transfers MOVQ MOVQ MOVQ Doubleword Transfers Data Transfer Register to Register Load from Memory Store to Memory MOVD MOVD MOVD Empty MMX State EMMS 9.4.1 Data Transfer Instructions The MOVD (Move 32 Bits) instruction transfers 32 bits of packed data from memory to an MMX register and vice versa; or from a general-purpose register to an MMX register and vice versa. The MOVQ (Move 64 Bits) instruction transfers 64 bits of packed data from memory to an MMX register and vice versa; or transfers data between MMX registers. 9.4.2 Arithmetic Instructions T...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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