Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: 7, "BCD and Packed BCD Integers," describe the floating-point, integer, and BCD data types. Section 4.9, "Overview of Floating-Point Exceptions," Section 4.9.1, "FloatingPoint Exception Conditions," and Section 4.9.2, "Floating-Point Exception Priority," give an overview of the floating-point exceptions that the x87 FPU can detect and report. 8.1 X87 FPU EXECUTION ENVIRONMENT The x87 FPU represents a separate execution environment within the IA-32 architecture (see Figure 8-1). This execution environment consists of eight data registers (called the x87 FPU data registers) and the following special-purpose registers: Status register Control register Tag word register Last instruction pointer register Last data (operand) pointer register Opcode register These registers are described in the following sections. Vol. 1 8-1 PROGRAMMING WITH THE X87 FPU The x87 FPU executes instructions from the processor's normal instruction stream. The state of the x87 FPU is independent from the state of the basic execution environment and from the state of SSE/SSE2/SSE3 extensions. However, the x87 FPU and Intel MMX technology share state because the MMX registers are aliased to the x87 FPU data registers. Therefore, when writing code that uses x87 FPU and MMX instructions, the programmer must explicitly manage the x87 FPU and MMX state (see Section 9.5, "Compatibility with x87 FPU Architecture"). 8.1.1 x87 FPU in 64-Bit Mode and Compatibility Mode In compatibility mode and 64-bit mode, x87 FPU instructions function like they do in protected mode. Memory operands are specified using the ModR/M, SIB encoding that is described in Section 3.7.5, "Specifying an Offset." 8.1.2 x87 FPU Data Registers The x87 FPU data registers (shown in Figure 8-1) consist of eight 80-bit registers. Values are stored in these registers in the double extended-precision floating-point format shown in Figure 4-3. When floating-point, integer, or packed BCD integer values are loaded from memory into any of the x87 FPU data registers, the values are automatically converted into double extended-precision floating-point format (if they are not already in that format). When computation results are subsequently transferred back into memory from any of the x87 FPU registers, the results can be left in the double extended-precision floating-point format or converted back into a shorter floating-point format, an integer format, or the packed BCD integer format. (See Section 8.2, "x87 FPU Data Types," for a description of the data types operated on by the x87 FPU.) 8-2 Vol. 1 PROGRAMMING WITH THE X87 FPU Data Registers Sign 79 78 R7 R6 R5 R4 R3 R2 R1 R0 15 64 63 Significand 0 Exponent 0 Control Register Status Register Tag Register 47 Last Instruction Pointer Last Data (Operand) Pointer 10 Opcode 0 0 Figure 8-1. x87 FPU Execution Environment The x87 FPU instructions treat the eight x87 FPU data registers as a register stack (see Figure...
View Full Document

This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

Ask a homework question - tutors are online