This preview shows page 1. Sign up to view the full content.
Unformatted text preview: vokes the exception handling routine. Note that if the external interrupt for x87 FPU errors is disabled when the processor executes an x87 FPU instruction, the processor will freeze until some other (enabled) interrupt occurs if an unmasked x87 FPU exception condition is in effect. If NE = 0 but the IGNNE# input is active, the processor disregards the exception and continues. Error reporting via an external interrupt is supported for MS-DOS compatibility. Chapter 17, "IA-32 Architecture Compatibility," of the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, contains further discussion of compatibility issues. The references above to the ERROR# output from the x87 FPU apply to the Intel 387 and Intel 287 math coprocessors (NPX chips). If one of these coprocessors encounters an unmasked exception condition, it signals the exception to the Intel 286 or D-14 Vol. 1 GUIDELINES FOR WRITING X87 FPU EXCEPTION HANDLERS Intel386 processor using the ERROR# status line between the processor and the coprocessor. See Section D.1, "MS-DOS Compatibility Sub-mode for Handling x87 FPU Exceptions," in this appendix, and Chapter 17, "IA-32 Architecture Compatibility," in the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, for differences in x87 FPU exception handling. The exception-handling routine is normally a part of the systems software. The routine must clear (or disable) the active exception flags in the x87 FPU status word before executing any floating-point instructions that cannot complete execution when there is a pending floating-point exception. Otherwise, the floating-point instruction will trigger the x87 FPU interrupt again, and the system will be caught in an endless loop of nested floating-point exceptions, and hang. In any event, the routine must clear (or disable) the active exception flags in the x87 FPU status word after handling them, and before IRET(D). Typical exception responses may include: Incrementing an exception counter for later display or printing. Printing or displaying diagnostic information (e.g., the x87 FPU environment and registers). Aborting further execution, or using the exception pointers to build an instruction that will run without exception and executing it. Applications programmers should consult their operating system's reference manuals for the appropriate system response to numerical exceptions. For systems programmers, some details on writing software exception handlers are provided in Chapter 5, "Interrupt and Exception Handling," in the Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A, as well as in Section D.3.4, "x87 FPU Exception Handling Examples," in this appendix. As discussed in Section D.2.1.2, "Recommended External Hardware to Support the MS-DOS Compatibility Sub-mode," some early FERR# to INTR hardware interface implementations are less robust than the recommended circuit. Thi...
View Full Document
This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.
- Winter '11