ia-32_volume1_basic-arch

The processor performs these actions 1 performs a

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Unformatted text preview: n. 6.4.5 Handling Floating-Point Exceptions When operating on individual or packed floating-point values, the IA-32 architecture supports a set of six floating-point exceptions. These exceptions can be generated during operations performed by the x87 FPU instructions or by SSE/SSE2/SSE3 instructions. When an x87 FPU instruction (including the FISTTP instruction in SSE3) generates one or more of these exceptions, it in turn generates floating-point error 6-18 Vol. 1 PROCEDURE CALLS, INTERRUPTS, AND EXCEPTIONS exception (#MF); when an SSE/SSE2/SSE3 instruction generates a floating-point exception, it in turn generates SIMD floating-point exception (#XF). See the following sections for further descriptions of the floating-point exceptions, how they are generated, and how they are handled: Section 4.9.1, "Floating-Point Exception Conditions," and Section 4.9.3, "Typical Actions of a Floating-Point Exception Handler" Section 8.4, "x87 FPU Floating-Point Exception Handling," and Section 8.5, "x87 FPU Floating-Point Exception Conditions" Section 11.5.1, "SIMD Floating-Point Exceptions" Interrupt Behavior 6.4.6 Interrupt and Exception Behavior in 64-Bit Mode 64-bit extensions expand the legacy IA-32 interrupt-processing and exceptionprocessing mechanism to allow support for 64-bit operating systems and applications. Changes include: All interrupt handlers pointed to by the IDT are 64-bit code (does not apply to the SMI handler). The size of interrupt-stack pushes is fixed at 64 bits. The processor uses 8-byte, zero extended stores. The stack pointer (SS:RSP) is pushed unconditionally on interrupts. In legacy environments, this push is conditional and based on a change in current privilege level (CPL). The new SS is set to NULL if there is a change in CPL. IRET behavior changes. There is a new interrupt stack-switch mechanism. The alignment of interrupt stack frame is different. 6.5 PROCEDURE CALLS FOR BLOCK-STRUCTURED LANGUAGES The IA-32 architecture supports an alternate method of performing procedure calls with the ENTER (enter procedure) and LEAVE (leave procedure) instructions. These instructions automatically create and release, respectively, stack frames for called procedures. The stack frames have predefined spaces for local variables and the necessary pointers to allow coherent returns from called procedures. They also allow scope rules to be implemented so that procedures can access their own local variables and some number of other variables located in other stack frames. Vol. 1 6-19 PROCEDURE CALLS, INTERRUPTS, AND EXCEPTIONS ENTER and LEAVE offer two benefits: They provide machine-language support for implementing block-structured languages, such as C and Pascal. They simplify procedure entry and exit in compiler-generated code. 6.5.1 ENTER Instruction The ENTER instruction creates a stack frame compatible with the scope rules typically used in block-structured languages. In block-structured languages,...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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