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# assume for si is 07 v and the diodes solution given

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Unformatted text preview: tery and diode polarities, assume the diode is forward-biased. Replace the diode with a piecewise linear model as shown. Then ( ( ( This voltage is consistent with the assumption that the diode is forward biased. 16 55:041 Electronic Circuits. The University of Iowa. Fall 2011. Problem 14 For the following circuit, determine resistance is negligible and that . . Assume the diodes’ internal and Solution Assume that both diodes are forward-biased. Replace the diodes with linear models as shown below. This is now a linear circuit that one can solve using nodal analysis, KCL, KVL, superposition, Thevenin or Norton equivalent circuits, etc. A KCL equation for the output node is ( Solving yields are forward biased. ( The sign of the voltage is consistent with our assumption: the diodes The current through the output resistor is flows through each diode, so that ⁄ = 3.1 mA. By symmetry, half of this current 17 55:041 Electronic Circuits. The University of Iowa. Fall 2011. Problem 15 For the following circuit, determine and Assume for Si is 0.7 V and for Ge is 0.3 V, and the diodes’ internal resistance is negligible. Solution Given the battery and diodes’ polarities, assume the diodes are forward-biased. Replace the diodes with piecewise linear models as shown. Then by inspection, and This voltage is consistent with the assumption that the diodes are forward biased. 18 55:041 Electronic Circuits. The University of Iowa. Fall 2011. Problem 16 De...
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## This note was uploaded on 10/26/2013 for the course ECE 55:041 taught by Professor Kruger during the Fall '11 term at University of Iowa.

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