Branchingcalling 31 branchsubroutine instruction

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Unformatted text preview: F000 Line EF27 Line 38: RA = ½ * (58-5C) = -2 Line 38: D7FE Line D7FE 30 3. What happens to the fetch3. execute pipeline when execute branching/calling subroutine? branching/calling 31 Branch/Subroutine Instruction Timing Branch/Subroutine • Branch instructions are those that Branch change the program counter (PC) (i.e., all branching and call instructions) all • Since the fetch stage incorrectly gets Since the machine code for the next sequential instruction when branching, this machine code must be dumped. this 32 bra Instruction in Data Sheet bra • Unconditional Unconditional branch branch • Pre-fetched Pre-fetched instruction must be dumped. dumped. • Nothing can be Nothing executed in the second cycle second 33 Branch/Subroutine Instruction Timing Branch/Subroutine • This dumping results in taken branches This (including unconditional branches) requiring two instruction clocks to process. process. • Branches that are not taken require only Branches one machine cycle. one 34 Using Program Loops to Create Time Delays Using • Consider the following code fragment: DelayLoop: decfsz DELAY_L decfsz bra DelayLoop bra • Because the DELAY_L register is 8-bit, Because the loop can be repeated a maximum of 256 times. 256 • How do we get a longer delay? • Solution: Looping within a loop or Solution: Nested Loop Nested 35 Using Program Loops to Create Time Delays Using DelayLoop: decfsz DELAY_L decfsz bra DelayLoop bra decfsz DELAY_H decfsz bra DelayLoop bra • • • • • • • e.g., DELAY_L = 0x00, DELAY_H = 0x02 The first...
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