Lecture12

Overlap among instruc2ons reduces this term timecycle

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Unformatted text preview: itecture - - > Implementa;on - - > Realiza;on Compiler Designer Processor Designer Chip Designer 16 Aug 2012 EE- 717/EE- 453@IITB 8 Iron Law •  Instruc2ons/Program –  Instruc2ons executed, not sta2c code size –  Determined by algorithm, compiler, ISA •  Cycles/Instruc2on –  Determined by ISA and CPU organiza2on –  Overlap among instruc2ons reduces this term •  Time/cycle –  Determined by technology, organiza2on, clever circuit design 16 Aug 2012 EE-717/EE-453@IITB 9 Technology •  Technology advances at astounding rate –  19th century: abempts to build mechanical computers –  Early 20th century: mechanical coun2ng systems (cash registers, etc.) –  Mid 20th century: vacuum tubes as switches –  Since: transistors, integrated circuits •  1965: Moore’s law [Gordon Moore] –  Predicted doubling of IC capacity every 18 months –  Has held and will con2nue to hold •  Drives func2onality, performance, cost –  Exponen2al improvement for 40+ years 16 Aug 2012 EE-717/EE-453@IITB 10 Computer Architecture •  Exercise in engineering tradeoff analysis –  Find the fastest/cheapest/power- efficient/etc. solu2on –  Op2miza2on problem with 100s of variables •  All the variables are changing –  At non- uniform rates –  With inflec2on points •  Two high- level effects: –  Technology push –  Applica2on Pull 16 Aug 2012 EE-717/EE-453@IITB 11 Technology Push •  What do these two intervals have in common? –  1776- 1999 (224 years) –  2000- 2001 (2 years) •  •  •  Answer: Equal progress in processor speed! The power of exponen2al growth! Driven by Moore’s L...
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This note was uploaded on 11/22/2013 for the course EE 717 taught by Professor Virendrasingh during the Fall '13 term at IIT Bombay.

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