2--x86 Processor

Beginning with the p6 processor a technique called

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: system setup. 2.2.2 Basic Execution Environment Address Space In 32-bit protected mode, a task or program can address a linear address space of up to 4 GBytes. Beginning with the P6 processor, a technique called Extended Physical Addressing allows a total of 64 GBytes of physical memory to be addressed. Real-address mode programs, on the other For More BS-IT Books, Notes & Assignments visit: www.bsit.zxq.net 2.2 x86 Architecture Details Downloaded From: www.bsit.zxq.net 37 hand, can only address a range of 1 MByte. If the processor is in protected mode and running multiple programs in virtual-8086 mode, each program has its own 1-MByte memory area. Basic Program Execution Registers Registers are high-speed storage locations directly inside the CPU, designed to be accessed at much higher speed than conventional memory. When a processing loop is optimized for speed, for example, loop counters are held in registers rather than variables. Figure 2–5 shows the basic program execution registers. There are eight general-purpose registers, six segment registers, a processor status flags register (EFLAGS), and an instruction pointer (EIP). Figure 2–5 Basic Program Execution Registers. 32-bit General-Purpose Registers EAX EBP EBX ESP ECX ESI EDX EDI 16-bit Segment Registers EFLAGS CS SS FS DS EIP ES GS General-Purpose Registers The general-purpose registers are primarily used for arithmetic and data movement. As shown in Figure 2–6, the lower 16 bits of the EAX register can be referenced by the name AX. Figure 2–6 General-Purpose Registers. 8 8 AH AL AX EAX 8 bits 8 bits 16 bits 32 bits Portions of some registers can be addressed as 8-bit values. For example, the AX register, has an 8-bit upper half named AH and an 8-bit lower half named AL. The same overlapping relationship For More BS-IT Books, Notes & Assignments visit: www.bsit.zxq.net 38 Chapter 2 • x86 Downloaded From: www.bsit.zxq.net Processor Architecture exists for the EAX, EBX, ECX, and EDX registers: 32-Bit 16-Bit 8-Bit (High) 8-Bit (Low) EAX AX AH AL EBX BX BH BL ECX CX CH CL EDX DX DH DL The remaining general-purpose registers can only be accessed using 32-bit or 16-bit names, as shown in the following table: 32-Bit 16-Bit ESI SI EDI DI EBP BP ESP SP Specialized Uses Some...
View Full Document

This note was uploaded on 11/29/2013 for the course CSE 451 taught by Professor Hussein during the Winter '13 term at Fatih Üniversitesi.

Ask a homework question - tutors are online