2--x86 Processor

Bsitzxqnet processor architecture core i74 processor

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Unformatted text preview: 6 to 2.7 GHz, 800 MHz bus Core 2 Duo—2 processor cores, 1.8–3.33 GHz, 64 bit, 6 MByte L2 cache Core 2 Quad—4 processor cores, up to 12 MByte L2 cache, 1333 MHz front side bus For More BS-IT Books, Notes & Assignments visit: www.bsit.zxq.net 42 Chapter 2 • x86 Downloaded From: www.bsit.zxq.net Processor Architecture Core i7—4 processor cores, (up to 2.93 GHz), 8 processing threads, 8 MByte smart cache, 3 channels DDR3 memory Hyperthreading and Multi-core Processing A dual processor system contains two separate physical computer processors, usually attached to the same motherboard with its own socket. The computer’s operating system will schedule two separate tasks (processes or threads) to run at the same time, in parallel. Intel Hyper-Threading (HT) technology allows two tasks to execute on a traditional single processor at the same time. This approach is less expensive than a dual processor system, and it makes efficient use of the processor’s resources. In effect, a single physical processor is divided into two logical processors. The shared resources include cache, registers, and execution units. The Intel Xeon processor and some Pentium 4 processors use HT technology. The term Dual Core refers to integrated circuit (IC) chips that contain two complete physical computer processor chips in the same IC package. Each processor has its own resources, and each has its own communication path to the computer system’s front-side bus. Sometimes, dual-core processors also incorporate HT technology, causing them to appear as four logical processors, running four tasks simultaneously. Intel also offers packages containing more than two processors, called multi core. CISC and RISC The Intel 8086 processor was the first in a line of processors using a Complex Instruction Set Computer (CISC) design. The instruction set is large, and includes a wide variety of memoryaddressing, shifting, arithmetic, data movement, and logical operations. Complex instruction sets per...
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