355Hm4-06 - Implement step. Turn in the list of implemented...

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ECE 3550 DIGITAL DESIGN FALL 2006 Homework Assignment #4 Total: 60 pts. Due 11:30am, Friday, October 6, 2006 You are to develop VHDL code for a chip that is functionally equivalent to the TI SN74HC148 8-Line To 3-Line Priority Encoder circuit. Use the available Xilinx WebPack and ModelSim MXE tools to design, simulate and map your circuit to a Xilinx XC2C256-TQ144 chip (the one on your CPLD Evaluation Board). The Data Sheets for the SN74HC148 chip can be found on Texas Instrument ’s Web Page (www.ti.com). You don't have to implement the propagation delays given in the Data Sheets. a) Turn in a hard copy of the .vhd file for your design. (20 pts.) b) Map your design to the XC2C256-QT144 chip by running the
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Unformatted text preview: Implement step. Turn in the list of implemented logic functions and that section of the pin assignments that exhibits the input and output signals of your design. (10 pts.) c) Develop a script ( .do file ) to verify the correct operation of your circuit as defined by its Function Table on Page 2 of the Data Sheets. Run both the functional and the RT simulations . Turn in a hard copy of your .do file along with print outs of the simulation waveforms . Comment on the simulation results for full credit. (30 pts.) Fall back position : turn in your .vhd and .do files along with comments for partial credit if you couldnt compile your design due to some fatal error....
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