analoglowpowlec6

F analog and low power design lecture 6 c 2003

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Unformatted text preview: ransistor has been operating • Minimize reliability factor R to improve reliability Minimize • R = Σ Agate fgate = activity x fanouts December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 6 Circuit-Level Power Estimation Need to consider capacitance at internal gate nodes to Need obtain more accurate power estimate obtain December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 7 Example CMOS Gate X1 December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 8 Signal Connections to Minimize Signal Power Power • Gate presents variable capacitance to power & ground, Gate depending on logic inputs depending f • IIf signal A has high activity and signal B has low activity, then connect A to x2 and B to x1 to minimize power power December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 9 High-Level Power Estimation • Method proposed by Landman and Rabaey for DSP Method circuits circuits • Stochastic modeling technique • Uses relationship between bit-level probabilities and Uses word-level statistics word-level • For speech, music, and images: Least – Least Significant Bits (LSBs) are uncorrelated in space/time with P = 0.5 and a = 0.25 0.5 0.25 – Independent of data distribution December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 10 Word-Level Data Model December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 200 11 • • • • Most Significant Bit Data Models F1 = bivariate normal distribution function F01 = univariate normal distribution function ρ1 = lag 1 correlation coefficient Breakpoint equations (where MSB correlation starts): December 9, 2013 Analog and Low-Power Design Lecture 6 (c) 20...
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This document was uploaded on 12/08/2013.

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