Layout_Examples

By choosing to leg a transistor its aspect ratio may

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Unformatted text preview: the available space. Also, with the choice of an even or odd number of legs and which nodes are source and drain, additional opportunities for diffusion sharing may be exposed. For example, imagine a transistor connecting to VDD and some signal out. If no other transistor has a diffusion connection to out, then this transistor may only share diffusion on the VDD side. However, if the transistor were legged by a factor of two with out in the center and VDD on either side, any transistor connecting to VDD could share with either side of the legged transistor. Fig.2.14 Legged transistor Routing Layer usage One of the earliest and most important decisions is the metal layer usage. There are a finite number of layers available for routing, and they have unique characteristics. Polysilicon has a high resistance, but it can be useful for short interconnections, especially if it turns into a gate at some point. Metal-1 (M1) is moderately narrow, fairly low in resistance, and easily accessible, making it ideal for local interconnect. Metal-2 (M2) often has a lower resistance, usually because 8 it is thicker or wider, but has larger space requirements and is harder to access. An M2 connection to a transistor gate, for example, requires a sizable space for a contact, a via, and the required poly, M1, and M2 landing pads (the wider metal areas surrounding vias). Therefore, in a two metal process, M2 is used for global routing. Higher metal layers are often reserved for long distance routing and global signals that require low resistance paths such as clocks and power. Fig.2.15 shows the wiring completed. All the A terminals have been connected in metal deposited in strips above the device. Note that the fingers of metal reaching down each terminal are all connected together at the top of the diagram. The same technique can be used to join the two B terminals. Metal fingers reach up into each B terminal, joining together at the bottom of the diagram. The gate connections are slightly different in that polysilicon is used. Using...
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