11 r5 r6 r7 r8 10k w 5 fig 11 tran sfo rmer coupled

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Unformatted text preview: IR CUIT/OVE RLOAD PROT ECT IONS. NOTES: 1. ALL F = FAU LT SIGNALS ARE TIED TOGETHER (BEING OPEN COLL ECTOR) AND FED INTO TM S3 2 0F2 40 7 A DSP CH IP. 2 . AL L R = RESET SIGNALS ARE T IED TOGETHER AND FED TO HC PL -3 16 J. 3 . OVERTEM P AND OVERL OAD/SHORT CIRC UIT FAULT SIGNALS AR E GENER ATED AS PER FIG(1 6) OVERTEMP IS AL SO FED IN TMS32 0 F24 07 A DSP C HIP . MCB 3 ø M AI NS D11 21 T5 RD 13 T6 RD 19 20 4 Dd D6 Dd M 3 P ha se A.C. MOT OR D5 Bill of Materials for Fig. (12) and Fig. (13) R1, R3, R5, R10, R11: 10K, 1/4W, 1% MFR R2: 560 Ohms, 1/4W, 1% MFR R4: 2.2 Meg, 1/4W, 5% R6: 100 Ohms,1/4 W,1% MFR R7: 20K, 1/4W, 1% MFR R8, R9: 61.9K, 1/4W, 1% MFR R12, R13: 1.24K, 1/4W, 1% MFR Rg: T.B.D. based on ton and toff & size of IGBT RD:100 Ohms,1/4 w, 5% P1: 10K, multi turn trimpot, Bourns 3006P or Spectrol C3, C4: 33 pf, silver dipped mica Dd: General Semiconductor make, Type: RGP02-20E, 0.5 A, 2000 V, trr: 300 ns Z1: Zener LM336, 2.5 Volt U3, U5 : LM339 Comparator U4 : LM-101 Op Amp SHUNT : 75 mV @ full load current LF: Gapped D C Choke for filtering rectified power CF: Electrolytic Filter Capacitor with very low ESR & ESL and screw type terminals to handle high ripple current. Voltage rating is determined by DC Voltage plus AC ripple Voltage CBI Module: IXYS Corporation Type Nos: MUBW 50-12A8 or any MUBW module from CBI 1, CBI 2 or CBI 3 series, depending on Motor H.P. rating. U1: Texas Instrument’s TMS320F2407A, FLASH programmable Digital Signal Processor with embedded software for AC Drive, using brake feature. IXDD414 Driver chip: 7 are required to implement the AC Drive, using Brake feature. HCPL316J (Opto-coupler): 7 are required to implement the AC Drive With Brake feature. Isolated DC-t o-DC Converter: 7 are required with specified isolation. IXAN0009 IXAN0009 V V t t + L + I/P H I/P CF RH CF RH 4 3 2 1 4 3 2 1 I X D D 4 1 4 I X D D 4 1 4 5 6 7 8 5 6 7 8 R1 C1 D1 Vcc D1 R1 C1 T1 D2 Z1 C2 D2 Z1 C2 Rp Rp Q4 Q1 Q3 H.V. D. C. COMM ON LOAD T3 Q2 H.V.D. C. Rp Rp FIG(14) A Transformer coupled Gate Drive c ir cu it employ ing D.C. restore tech nique and s howing how to generate -ve bias during turn -off. I X D D OR 4 0 8 I X D D OR 4...
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This note was uploaded on 01/15/2014 for the course ECE 624 taught by Professor Staff during the Winter '08 term at Ohio State.

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