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lec2_yield_moore

77 elec 7770 advanced vlsi design agrawal 4 yield

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Unformatted text preview: vanced VLSI Design (Agrawal) 4 Yield Parameters Defect density (d ) = Average number of defects per unit chip area chip Chip area (A ) Clustering parameter (α ) Negative binomial distribution of defects, Negative p (x ) = Prob(number of defects on a chip = x ) Γ (α +x ) (Ad / α) x = . x ! Γ ( α) (1+Ad / α) α+x where Γ is the gamma function α = 0, p (x ) is a delta function (max. clustering) α = ∞ , p (x ) is Poisson distribution (no clustering) Spring 2014, Jan 15 Spring ELEC 7770: Advanced VLSI Design (Agrawal) 5 Yield Equation Y = Prob( zero defect on a chip ) = p (0) Y = ( 1 + Ad / α ) – α Example: Ad = 1.0, α = 0.5, Y = 0.58 Unclustered defects: α = ∞ , Y = e – Ad Example: Ad = 1.0, α = ∞ , Y = 0.37 too pessimistic ! Spring 2014, Jan 15 Spring ELEC 7770: Advanced VLSI Design (Agrawal) 6 Effect of Defect Clustering 1.00 Ad = 0.5 Yield 0.75 e-0.5 = 0.607 0.50 0.25 0.00 0 0.5 1.0 1.5 2.0 Clustering Parameter, α Spring 2014, Jan 15 Spring ELEC 7770: Advanced VLSI Design (Agrawal) 7 0.906 0.5 0.27 Yield of 1 cm2 chip 0.913 0.1 Initial process 5.0 Mature proc...
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