Bits widens all registers to 64 bits and makes other

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Unformatted text preview: es (AMD64) changes 2004: Intel capitulates and embraces AMD64 (calls it EM64T) and 2004: adds more media extensions adds “This history illustrates the impact of the “golden handcuffs” of compatibility: “adding new features as someone might add clothing to a packed bag” “an architecture that is difficult to explain and impossible to love” 2004 © Morgan Kaufman Publishers Spring 2013, Jan 25 . . . Spring ELEC 5200-001/6200-001 Lecture 3 46 IA-32 Overview Complexity: – Instructions from 1 to 17 bytes long – one operand must act as both a source and destination – one operand can come from memory – complex addressing modes e.g., “base or scaled index with 8 or 32 bit displacement” Saving grace: – the most frequently used instructions are not too difficult to build – compilers avoid the portions of the architecture that are slow “what the x86 lacks in style is made up in quantity, what making it beautiful from the right perspective” making 2004 © Morgan Kaufman Publishers Spring 2013, Jan 25 . . . Spring ELEC 5200-001/6200-001 Lecture 3 47 IA-32 Registers Registers in the 32-bit subset that originated with 80386 Name U se 31 0 EAX GPR 0 ECX GPR 1 EDX GPR 2 EBX GPR 3 ESP GPR 4 EBP GPR 5 ESI GPR 6 EDI GPR 7 CS Data segment pointer 1 FS Data segment pointer 2 GS Spring 2013, Jan 25 . . . Spring Data segment pointer 0 ES EFLAGS Stack segment pointer (top of stack) DS EIP Code segment pointer SS Eight general purpose registers Data segment pointer 3 Instruction pointer (PC) Condition codes ELEC 5200-001/6200-001 Lecture 3 2004 © Morgan Kaufman Publishers 48 IA-32 Register Restrictions Fourteen major registers. Eight 32-bit general purpose registers. ESP or EBP cannot contain memory address. ESP cannot contain displacement from base ESP address. address. ... See Figure 2.38, page 170. 2004 © Morgan Kaufman Publishers Spring 2013, Jan 25 . . . Spring ELEC 5200-001/6200-001 Lecture 3 49 IA-32 Typical Instructions Four major types of integer instructions: – Data movement including move, push, pop – Arithmetic and logical (destination register or memory) – Control flow (use of condition codes / flags ) – String instructions, including string move and string compare 2004 © Morgan Kaufman Publishers Spring 2013, Jan 25 . . . Spring ELEC 5200-001/6200-001 Lect...
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