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tutorial-Nov22-solutions (1)

The essential traffic is 248 38 bytes 210 bytes the

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Unformatted text preview: that the first three accesses result in cold misses as it is the first access by each pro- cessor to the block. The miss at time slot 5 is a false- sharing miss because word A will not be accessed for as long as the block is in the cache; it is invalidated at time- slot 7. As for the miss experienced by processor 2 at time slot 6, it is obviously a true- sharing miss as it brings in a new value in the cache. For the same reason, the miss at slot 8 is also a true- sharing miss as processor 3 will subsequently access word B. b) The false- sharing miss at time- slot 5 can be ignored. c) Number of read requests: 6 (traffic: 6 x 38 bytes = 228 bytes) Number of bus updates: 2 (traffic: 2 x 10 bytes = 20 bytes) Total traffic: 248 bytes The only non- essential traffic is the read request associated with the false- sharing miss: 38 bytes. The essential traffic is 248 - 38 bytes = 210 bytes. The fraction of essential traffic is 210/248 = 85% Problem 5.12: Processor 1 Processor 2 Processor 3 Miss type 1 RA cold miss 2 RB cold miss 3 RC cold miss 4 WA 5 RD cold miss; replaces block 6 RB false- sharing miss 7 WB 8 RC replacement miss 9 RB true- sharing miss a) At time- slot 5 the block containing variables A, B and C is replaced. The miss at time- slot 6 is obviously a false- sharing miss as a new word is not accessed while the block...
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