memory - Memory The Memory/Processor Performance Gap...

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Memory
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The Memory/Processor Performance Gap Memory-Processor Performance Gap
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The memory hierarchy CPU Level n Level 2 Level 1 Levels in the memory hierarchy Increasing distance from the CPU in access time Size of the memory at each level
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The memory hierarchy
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Fundamentals of Memory Hierarchy Locality Temporal locality The currently required data are likely to need again in the near future Spatial locality There is high probability that the other data nearby will be need soon
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Two Processor/Memory Architectures Processor Program memory Data memory Processor Memory (program and data) Harvard Princeton Princeton Fewer memory wires Harvard Simultaneous program and data memory access
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Memory Access Process CPU TLB Cache Main Memory Virtual address Physical  Address Tag miss hit data hit miss Address  Translation TLB (Translation lookaside buffer): Translate a virtual address to a physical address
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Memory management units Handles DRAM refresh, bus interface and arbitration Takes care of memory sharing among multiple processors Translates logic memory addresses from processor to physical memory addresses CPU main memory memory management unit logical address physical address
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Memory Data Organization Endianness Big Endian/Little Endian Memory data alignment
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Endianness The order of bytes (sometimes “bit”) in memory to represent different data types Little/Big Endian Little Endian: put the least-significant byte first (at lower address) e.g. Intel Processor Big Endian: put the most-significant byte first e.g.some PowerPCs, Motorola, MIPS, SPARC
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Big/Little Endian Example 32bit data 0xFABC0123 at address 0xFF20 0xFF20 0xFF21 0xFF22 0xFF23 Big Endian 0xFA 0xBC 0x01 0x23 Little Endian 0x23 0x01 0xBC 0xFA
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This note was uploaded on 04/09/2008 for the course CSCE 313 taught by Professor Quan during the Spring '08 term at South Carolina.

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memory - Memory The Memory/Processor Performance Gap...

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