Lecture 18

Ming c wu 6 cs stage with diode connected pmos device

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Unformatted text preview: s a high output resistance and can tolerate a small voltage drop across it. EE105, Fall 2013 Lecture 18 – Slide 10 Prof. Ming C. Wu 5 PMOS CS Stage with NMOS as Load Av = − gm 2 (rO1 || rO 2 ) §༊  Similarly, with PMOS as input stage and NMOS as the load, the voltage gain is the same as before. EE105, Fall 2013 Lecture 18 – Slide 11 Prof. Ming C. Wu CS Stage with Diode-Connected Load "1 % Av = − g m1 $ $ g || rO 2 || rO1 ' ' # m2 & W/L 1 Av = − g m1 ⋅ =− gm2 W/L ( ( ) ) 1 2 §༊...
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This note was uploaded on 01/22/2014 for the course EE 105 taught by Professor King-liu during the Fall '07 term at Berkeley.

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