Lecture 15

Gate insulator ideally there are no charges within the

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Unformatted text preview: ote that an electron (–q charge) driFs in the [email protected] of increasing [email protected]: dV Fe = −qE = −q dx E ( x) ρ ( x) 0 − qNA EE105, Fall 2013 Xd x 0 V ( x) Xd Lecture 15 – Slide 12 x 0 Xd x Prof. Ming C. Wu 6 Boundary CondiNons §༊  ElectrostaNc potenNal must be a conNnuous funcNon. Otherwise, the electric field (force) would be infinite. §༊  Electric field does not have to be conNnuous, however. Consider an interface between two materials: Δx E1 (ε1 ) ∫ ε E ⋅ dS = −ε1E1S + ε 2 E2 S = Qinside E2 (ε 2 ) S If Qinside ⎯ྎΔx→0 → 0, then ⎯ྎ ⎯ྎ − ε1E1S + ε 2 E2 S = 0 E1 ε 2 = E2 ε 1 DisconNnuity in electric displacement εEà༎ charge density at interface! EE105, Fall 2013 Lecture 15 – Slide 13 Prof. Ming C. Wu MOS Capacitor Electrostatics §༊  Gate electrode: –  Since E(x) = 0 in a metallic material, V(x) is constant. §༊  Gate-electrode/gate-insulator interface: –  The gate charge is located at this interface. –  à༎E(x) changes to a non-zero value inside the gate insulator. §༊  Gate insulator: –  Ideally, there are no charges within the gate insulator. –  E(x) is constant, and V(x) is linear. §༊  Gate-insulator/semiconductor interface: –  Since the dielectric permittivity of SiO2 is lower than that of Si, E(x) is larger in the gate insulator than in the Si. §༊  Semiconductor: –  If r(x) is constant (non-zero), then V(x) is quadratic. EE105, Fall 2013 Lecture 15 – Slide 14 Prof. Ming C. Wu 7 MOS Capacitor: VGB = 0 §༊  If the gate and substrate materials are not the same (typically the case), there is a built- in potenNal (~1V across the gate insulator). –  [email protected] charge is located at the gate interface, and [email protected] charge in the Si. –  The substrate surface region is depleted of holes, down to a depth Xdo ρ ( x) Xdo x 0 V ( x) -tox 0 VS,o Xdo Qdep x Lecture 1...
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This note was uploaded on 01/22/2014 for the course EE 105 taught by Professor King-liu during the Fall '07 term at Berkeley.

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