ee3954_fall13_10_adc

24 adc register sfr settings adc25 digital input the

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Unformatted text preview: 3 RG4 RG5 RG6 RG7 ADC.21 ADC The configuration … ADC.22 ADC.23 ADC Register (SFR) settings ADC.24 ADC Register (SFR) settings ADC.25 Digital input: the standard input as we used it before!! ADC.26 ADC The result … ADC.27 ADC The result … ADC.28 ADC Outside & Inside ADC.29 ADC Timing … ADC.30 Sample/Hold Acquisition Time Tacq = Amplifier Settling Time (Tamp) + Holding Capacitor Charging Time (Tc) + Temperature Coefficient Time (Tcoff) Tacq = Tamp + Tc + Tcoff Tamp = 2 µs for PIC 16F877 Next few slides find Tc & Tcoff: ADC.31 Calculations for Tc: Capacitor Charges through Series Resistances: Rs = External signals source resistance (use 10,000 in lab) Ric = Interconnect Resistance (Ric ≤ 1,000 ohm) Rss = Sample Switch Resistance (function of Vdd) (for Vdd = 5v, Rss = 7,000 ohm) CHOLD = Capacitor = 120 * 10-12 farads So Time for capacitor to charge: Tc = - CHOLD*( Rs + Ric + Rss) * ln (1/2047) ADC.32 Calculations for Tc (continued): Tc = - CHOLD( Rs + Ric + Rss) * ln (1/2047)...
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This document was uploaded on 01/22/2014.

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